0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mfd/stericsson,db8500-prcmu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: ST-Ericsson DB8500 PRCMU - Power Reset and Control Management Unit
0008
0009 maintainers:
0010 - Linus Walleij <linus.walleij@linaro.org>
0011
0012 description:
0013 The DB8500 Power Reset and Control Management Unit is an XP70 8-bit
0014 microprocessor that is embedded in the always-on power domain of the
0015 DB8500 SoCs to manage the low power states, powering up and down parts
0016 of the silicon, and controlling reset of different IP blocks.
0017
0018 properties:
0019 $nodename:
0020 pattern: '^prcmu@[0-9a-f]+$'
0021
0022 compatible:
0023 description: The device is compatible both to the device-specific
0024 compatible "stericsson,db8500-prcmu" and "syscon". The latter
0025 compatible is needed for the device to be exposed as a system
0026 controller so that arbitrary registers can be access by
0027 different operating system components.
0028 items:
0029 - const: stericsson,db8500-prcmu
0030 - const: syscon
0031
0032 reg:
0033 items:
0034 - description: Main PRCMU register area
0035 - description: PRCMU TCPM register area
0036 - description: PRCMU TCDM register area
0037
0038 reg-names:
0039 items:
0040 - const: prcmu
0041 - const: prcmu-tcpm
0042 - const: prcmu-tcdm
0043
0044 interrupts:
0045 maxItems: 1
0046
0047 '#address-cells':
0048 const: 1
0049
0050 '#size-cells':
0051 const: 1
0052
0053 ranges: true
0054
0055 interrupt-controller: true
0056
0057 '#interrupt-cells':
0058 const: 2
0059
0060 db8500-prcmu-regulators:
0061 description: Node describing the DB8500 regulators. These are mainly
0062 power rails inside the silicon but some of those are also routed
0063 out to external pins.
0064 type: object
0065
0066 properties:
0067 compatible:
0068 const: stericsson,db8500-prcmu-regulator
0069
0070 db8500_vape:
0071 description: The voltage for the application processor, the
0072 main voltage domain for the chip.
0073 type: object
0074 $ref: ../regulator/regulator.yaml#
0075
0076 db8500_varm:
0077 description: The voltage for the ARM Cortex A-9 CPU.
0078 type: object
0079 $ref: ../regulator/regulator.yaml#
0080
0081 db8500_vmodem:
0082 description: The voltage for the modem subsystem.
0083 type: object
0084 $ref: ../regulator/regulator.yaml#
0085
0086 db8500_vpll:
0087 description: The voltage for the phase locked loop clocks.
0088 type: object
0089 $ref: ../regulator/regulator.yaml#
0090
0091 db8500_vsmps1:
0092 description: Also known as VIO12, is a step-down voltage regulator
0093 for 1.2V I/O. SMPS means System Management Power Source.
0094 type: object
0095 $ref: ../regulator/regulator.yaml#
0096
0097 db8500_vsmps2:
0098 description: Also known as VIO18, is a step-down voltage regulator
0099 for 1.8V I/O. SMPS means System Management Power Source.
0100 type: object
0101 $ref: ../regulator/regulator.yaml#
0102
0103 db8500_vsmps3:
0104 description: This is a step-down voltage regulator
0105 for 0.87 thru 1.875V I/O. SMPS means System Management Power Source.
0106 type: object
0107 $ref: ../regulator/regulator.yaml#
0108
0109 db8500_vrf1:
0110 description: RF transciever voltage regulator.
0111 type: object
0112 $ref: ../regulator/regulator.yaml#
0113
0114 db8500_sva_mmdsp:
0115 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
0116 voltage regulator. This is the voltage for the accelerator DSP
0117 for video encoding and decoding.
0118 type: object
0119 $ref: ../regulator/regulator.yaml#
0120
0121 db8500_sva_mmdsp_ret:
0122 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
0123 voltage regulator for retention mode.
0124 type: object
0125 $ref: ../regulator/regulator.yaml#
0126
0127 db8500_sva_pipe:
0128 description: Smart Video Accelerator (SVA) multimedia DSP (MMDSP)
0129 voltage regulator for the data pipe.
0130 type: object
0131 $ref: ../regulator/regulator.yaml#
0132
0133 db8500_sia_mmdsp:
0134 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
0135 voltage regulator. This is the voltage for the accelerator DSP
0136 for image encoding and decoding.
0137 type: object
0138 $ref: ../regulator/regulator.yaml#
0139
0140 db8500_sia_mmdsp_ret:
0141 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
0142 voltage regulator for retention mode.
0143 type: object
0144 $ref: ../regulator/regulator.yaml#
0145
0146 db8500_sia_pipe:
0147 description: Smart Image Accelerator (SIA) multimedia DSP (MMDSP)
0148 voltage regulator for the data pipe.
0149 type: object
0150 $ref: ../regulator/regulator.yaml#
0151
0152 db8500_sga:
0153 description: Smart Graphics Accelerator (SGA) voltage regulator.
0154 This is in effect controlling the power to the MALI400 3D
0155 accelerator block.
0156 type: object
0157 $ref: ../regulator/regulator.yaml#
0158
0159 db8500_b2r2_mcde:
0160 description: Blit Blend Rotate and Rescale (B2R2), and Multi-Channel
0161 Display Engine (MCDE) voltage regulator. These are two graphics
0162 blocks.
0163 type: object
0164 $ref: ../regulator/regulator.yaml#
0165
0166 db8500_esram12:
0167 description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator.
0168 type: object
0169 $ref: ../regulator/regulator.yaml#
0170
0171 db8500_esram12_ret:
0172 description: Embedded Static RAM (ESRAM) 1 and 2 voltage regulator for
0173 retention mode.
0174 type: object
0175 $ref: ../regulator/regulator.yaml#
0176
0177 db8500_esram34:
0178 description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator.
0179 type: object
0180 $ref: ../regulator/regulator.yaml#
0181
0182 db8500_esram34_ret:
0183 description: Embedded Static RAM (ESRAM) 3 and 4 voltage regulator for
0184 retention mode.
0185 type: object
0186 $ref: ../regulator/regulator.yaml#
0187
0188 required:
0189 - compatible
0190 - db8500_vape
0191 - db8500_varm
0192 - db8500_vmodem
0193 - db8500_vpll
0194 - db8500_vsmps1
0195 - db8500_vsmps2
0196 - db8500_vsmps3
0197 - db8500_vrf1
0198 - db8500_sva_mmdsp
0199 - db8500_sva_mmdsp_ret
0200 - db8500_sva_pipe
0201 - db8500_sia_mmdsp
0202 - db8500_sia_mmdsp_ret
0203 - db8500_sia_pipe
0204 - db8500_sga
0205 - db8500_b2r2_mcde
0206 - db8500_esram12
0207 - db8500_esram12_ret
0208 - db8500_esram34
0209 - db8500_esram34_ret
0210
0211 additionalProperties: false
0212
0213 patternProperties:
0214 "^thermal@[0-9a-f]+$":
0215 description: Node describing the DB8500 thermal control functions.
0216 This binds to an operating system driver that monitors the
0217 temperature of the SoC.
0218 type: object
0219
0220 properties:
0221 compatible:
0222 const: stericsson,db8500-thermal
0223
0224 reg:
0225 maxItems: 1
0226
0227 interrupts:
0228 items:
0229 - description: Hotmon low interrupt (falling temperature)
0230 - description: Hotmon high interrupt (rising temperature)
0231
0232 interrupt-names:
0233 items:
0234 - const: IRQ_HOTMON_LOW
0235 - const: IRQ_HOTMON_HIGH
0236
0237 '#thermal-sensor-cells':
0238 const: 0
0239
0240 additionalProperties: false
0241
0242 "^prcmu-timer-4@[0-9a-f]+$":
0243 description: Node describing the externally visible timer 4 in the
0244 PRCMU block. This timer is interesting to the operating system
0245 since even thought it has a very low resolution (32768 Hz) it is
0246 always on, and thus provides a consistent monotonic timeline for
0247 the system.
0248 type: object
0249
0250 properties:
0251 compatible:
0252 const: stericsson,db8500-prcmu-timer-4
0253
0254 reg:
0255 maxItems: 1
0256
0257 additionalProperties: false
0258
0259 "^ab850[05]$":
0260 description: Node describing the Analog Baseband 8500 mixed-signals
0261 ASIC AB8500 and subcomponents. The AB8500 is accessed through the
0262 PRCMU and hence it appears here. This component has a separate
0263 set of devicetree bindings. The AB8505 is a newer version of the
0264 same ASIC.
0265 type: object
0266 $ref: stericsson,ab8500.yaml#
0267
0268 required:
0269 - compatible
0270 - reg
0271 - '#address-cells'
0272 - '#size-cells'
0273 - ranges
0274 - interrupts
0275 - interrupt-controller
0276 - '#interrupt-cells'
0277 - db8500-prcmu-regulators
0278
0279 additionalProperties: false
