0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mfd/brcm,bcm6368-gpio-sysctl.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Broadcom BCM6368 GPIO System Controller Device Tree Bindings
0008
0009 maintainers:
0010 - Álvaro Fernández Rojas <noltari@gmail.com>
0011 - Jonas Gorski <jonas.gorski@gmail.com>
0012
0013 description:
0014 Broadcom BCM6368 SoC GPIO system controller which provides a register map
0015 for controlling the GPIO and pins of the SoC.
0016
0017 properties:
0018 "#address-cells": true
0019
0020 "#size-cells": true
0021
0022 compatible:
0023 items:
0024 - const: brcm,bcm6368-gpio-sysctl
0025 - const: syscon
0026 - const: simple-mfd
0027
0028 ranges:
0029 maxItems: 1
0030
0031 reg:
0032 maxItems: 1
0033
0034 patternProperties:
0035 "^gpio@[0-9a-f]+$":
0036 # Child node
0037 type: object
0038 $ref: "../gpio/brcm,bcm6345-gpio.yaml"
0039 description:
0040 GPIO controller for the SoC GPIOs. This child node definition
0041 should follow the bindings specified in
0042 Documentation/devicetree/bindings/gpio/brcm,bcm6345-gpio.yaml.
0043
0044 "^pinctrl@[0-9a-f]+$":
0045 # Child node
0046 type: object
0047 $ref: "../pinctrl/brcm,bcm6368-pinctrl.yaml"
0048 description:
0049 Pin controller for the SoC pins. This child node definition
0050 should follow the bindings specified in
0051 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.yaml.
0052
0053 required:
0054 - "#address-cells"
0055 - compatible
0056 - ranges
0057 - reg
0058 - "#size-cells"
0059
0060 additionalProperties: false
0061
0062 examples:
0063 - |
0064 syscon@10000080 {
0065 #address-cells = <1>;
0066 #size-cells = <1>;
0067 compatible = "brcm,bcm6368-gpio-sysctl", "syscon", "simple-mfd";
0068 reg = <0x10000080 0x80>;
0069 ranges = <0 0x10000080 0x80>;
0070
0071 gpio@0 {
0072 compatible = "brcm,bcm6368-gpio";
0073 reg-names = "dirout", "dat";
0074 reg = <0x0 0x8>, <0x8 0x8>;
0075
0076 gpio-controller;
0077 gpio-ranges = <&pinctrl 0 0 38>;
0078 #gpio-cells = <2>;
0079 };
0080
0081 pinctrl: pinctrl@18 {
0082 compatible = "brcm,bcm6368-pinctrl";
0083 reg = <0x18 0x4>, <0x38 0x4>;
0084
0085 pinctrl_analog_afe_0: analog_afe_0-pins {
0086 function = "analog_afe_0";
0087 pins = "gpio0";
0088 };
0089
0090 pinctrl_analog_afe_1: analog_afe_1-pins {
0091 function = "analog_afe_1";
0092 pins = "gpio1";
0093 };
0094
0095 pinctrl_sys_irq: sys_irq-pins {
0096 function = "sys_irq";
0097 pins = "gpio2";
0098 };
0099
0100 pinctrl_serial_led: serial_led-pins {
0101 pinctrl_serial_led_data: serial_led_data-pins {
0102 function = "serial_led_data";
0103 pins = "gpio3";
0104 };
0105
0106 pinctrl_serial_led_clk: serial_led_clk-pins {
0107 function = "serial_led_clk";
0108 pins = "gpio4";
0109 };
0110 };
0111
0112 pinctrl_inet_led: inet_led-pins {
0113 function = "inet_led";
0114 pins = "gpio5";
0115 };
0116
0117 pinctrl_ephy0_led: ephy0_led-pins {
0118 function = "ephy0_led";
0119 pins = "gpio6";
0120 };
0121
0122 pinctrl_ephy1_led: ephy1_led-pins {
0123 function = "ephy1_led";
0124 pins = "gpio7";
0125 };
0126
0127 pinctrl_ephy2_led: ephy2_led-pins {
0128 function = "ephy2_led";
0129 pins = "gpio8";
0130 };
0131
0132 pinctrl_ephy3_led: ephy3_led-pins {
0133 function = "ephy3_led";
0134 pins = "gpio9";
0135 };
0136
0137 pinctrl_robosw_led_data: robosw_led_data-pins {
0138 function = "robosw_led_data";
0139 pins = "gpio10";
0140 };
0141
0142 pinctrl_robosw_led_clk: robosw_led_clk-pins {
0143 function = "robosw_led_clk";
0144 pins = "gpio11";
0145 };
0146
0147 pinctrl_robosw_led0: robosw_led0-pins {
0148 function = "robosw_led0";
0149 pins = "gpio12";
0150 };
0151
0152 pinctrl_robosw_led1: robosw_led1-pins {
0153 function = "robosw_led1";
0154 pins = "gpio13";
0155 };
0156
0157 pinctrl_usb_device_led: usb_device_led-pins {
0158 function = "usb_device_led";
0159 pins = "gpio14";
0160 };
0161
0162 pinctrl_pci: pci-pins {
0163 pinctrl_pci_req1: pci_req1-pins {
0164 function = "pci_req1";
0165 pins = "gpio16";
0166 };
0167
0168 pinctrl_pci_gnt1: pci_gnt1-pins {
0169 function = "pci_gnt1";
0170 pins = "gpio17";
0171 };
0172
0173 pinctrl_pci_intb: pci_intb-pins {
0174 function = "pci_intb";
0175 pins = "gpio18";
0176 };
0177
0178 pinctrl_pci_req0: pci_req0-pins {
0179 function = "pci_req0";
0180 pins = "gpio19";
0181 };
0182
0183 pinctrl_pci_gnt0: pci_gnt0-pins {
0184 function = "pci_gnt0";
0185 pins = "gpio20";
0186 };
0187 };
0188
0189 pinctrl_pcmcia: pcmcia-pins {
0190 pinctrl_pcmcia_cd1: pcmcia_cd1-pins {
0191 function = "pcmcia_cd1";
0192 pins = "gpio22";
0193 };
0194
0195 pinctrl_pcmcia_cd2: pcmcia_cd2-pins {
0196 function = "pcmcia_cd2";
0197 pins = "gpio23";
0198 };
0199
0200 pinctrl_pcmcia_vs1: pcmcia_vs1-pins {
0201 function = "pcmcia_vs1";
0202 pins = "gpio24";
0203 };
0204
0205 pinctrl_pcmcia_vs2: pcmcia_vs2-pins {
0206 function = "pcmcia_vs2";
0207 pins = "gpio25";
0208 };
0209 };
0210
0211 pinctrl_ebi_cs2: ebi_cs2-pins {
0212 function = "ebi_cs2";
0213 pins = "gpio26";
0214 };
0215
0216 pinctrl_ebi_cs3: ebi_cs3-pins {
0217 function = "ebi_cs3";
0218 pins = "gpio27";
0219 };
0220
0221 pinctrl_spi_cs2: spi_cs2-pins {
0222 function = "spi_cs2";
0223 pins = "gpio28";
0224 };
0225
0226 pinctrl_spi_cs3: spi_cs3-pins {
0227 function = "spi_cs3";
0228 pins = "gpio29";
0229 };
0230
0231 pinctrl_spi_cs4: spi_cs4-pins {
0232 function = "spi_cs4";
0233 pins = "gpio30";
0234 };
0235
0236 pinctrl_spi_cs5: spi_cs5-pins {
0237 function = "spi_cs5";
0238 pins = "gpio31";
0239 };
0240
0241 pinctrl_uart1: uart1-pins {
0242 function = "uart1";
0243 group = "uart1_grp";
0244 };
0245 };
0246 };
