0001 * Atmel Universal Synchronous Asynchronous Receiver/Transmitter (USART)
0002
0003 Required properties for USART:
0004 - compatible: Should be one of the following:
0005 - "atmel,at91rm9200-usart"
0006 - "atmel,at91sam9260-usart"
0007 - "microchip,sam9x60-usart"
0008 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
0009 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
0010 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
0011 - reg: Should contain registers location and length
0012 - interrupts: Should contain interrupt
0013 - clock-names: tuple listing input clock names.
0014 Required elements: "usart"
0015 - clocks: phandles to input clocks.
0016
0017 Required properties for USART in SPI mode:
0018 - #size-cells : Must be <0>
0019 - #address-cells : Must be <1>
0020 - cs-gpios: chipselects (internal cs not supported)
0021 - atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
0022
0023 Optional properties in serial and SPI mode:
0024 - dma bindings for dma transfer:
0025 - dmas: DMA specifier, consisting of a phandle to DMA controller node,
0026 memory peripheral interface and USART DMA channel ID, FIFO configuration.
0027 The order of DMA channels is fixed. The first DMA channel must be TX
0028 associated channel and the second one must be RX associated channel.
0029 Refer to dma.txt and atmel-dma.txt for details.
0030 - dma-names: "tx" for TX channel.
0031 "rx" for RX channel.
0032 The order of dma-names is also fixed. The first name must be "tx"
0033 and the second one must be "rx" as in the examples below.
0034
0035 Optional properties in serial mode:
0036 - atmel,use-dma-rx: use of PDC or DMA for receiving data
0037 - atmel,use-dma-tx: use of PDC or DMA for transmitting data
0038 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively.
0039 It will use specified PIO instead of the peripheral function pin for the USART feature.
0040 If unsure, don't specify this property.
0041 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
0042 capable USARTs.
0043 - rs485-rts-delay, rs485-rx-during-tx, linux,rs485-enabled-at-boot-time: see rs485.txt
0044
0045 <chip> compatible description:
0046 - at91rm9200: legacy USART support
0047 - at91sam9260: generic USART implementation for SAM9 SoCs
0048
0049 Example:
0050 - use PDC:
0051 usart0: serial@fff8c000 {
0052 compatible = "atmel,at91sam9260-usart";
0053 reg = <0xfff8c000 0x4000>;
0054 interrupts = <7>;
0055 clocks = <&usart0_clk>;
0056 clock-names = "usart";
0057 atmel,use-dma-rx;
0058 atmel,use-dma-tx;
0059 rts-gpios = <&pioD 15 GPIO_ACTIVE_LOW>;
0060 cts-gpios = <&pioD 16 GPIO_ACTIVE_LOW>;
0061 dtr-gpios = <&pioD 17 GPIO_ACTIVE_LOW>;
0062 dsr-gpios = <&pioD 18 GPIO_ACTIVE_LOW>;
0063 dcd-gpios = <&pioD 20 GPIO_ACTIVE_LOW>;
0064 rng-gpios = <&pioD 19 GPIO_ACTIVE_LOW>;
0065 };
0066
0067 - use DMA:
0068 usart0: serial@f001c000 {
0069 compatible = "atmel,at91sam9260-usart";
0070 reg = <0xf001c000 0x100>;
0071 interrupts = <12 4 5>;
0072 clocks = <&usart0_clk>;
0073 clock-names = "usart";
0074 atmel,use-dma-rx;
0075 atmel,use-dma-tx;
0076 dmas = <&dma0 2 0x3>,
0077 <&dma0 2 0x204>;
0078 dma-names = "tx", "rx";
0079 atmel,fifo-size = <32>;
0080 };
0081
0082 - SPI mode:
0083 #include <dt-bindings/mfd/at91-usart.h>
0084
0085 spi0: spi@f001c000 {
0086 #address-cells = <1>;
0087 #size-cells = <0>;
0088 compatible = "atmel,at91rm9200-usart", "atmel,at91sam9260-usart";
0089 atmel,usart-mode = <AT91_USART_MODE_SPI>;
0090 reg = <0xf001c000 0x100>;
0091 interrupts = <12 IRQ_TYPE_LEVEL_HIGH 5>;
0092 clocks = <&usart0_clk>;
0093 clock-names = "usart";
0094 dmas = <&dma0 2 AT91_DMA_CFG_PER_ID(3)>,
0095 <&dma0 2 (AT91_DMA_CFG_PER_ID(4) | AT91_DMA_CFG_FIFOCFG_ASAP)>;
0096 dma-names = "tx", "rx";
0097 cs-gpios = <&pioB 3 0>;
0098 };
