0001 The Aspeed System Control Unit manages the global behaviour of the SoC,
0002 configuring elements such as clocks, pinmux, and reset.
0003
0004 Required properties:
0005 - compatible: One of:
0006 "aspeed,ast2400-scu", "syscon", "simple-mfd"
0007 "aspeed,ast2500-scu", "syscon", "simple-mfd"
0008
0009 - reg: contains the offset and length of the SCU memory region
0010 - #clock-cells: should be set to <1> - the system controller is also a
0011 clock provider
0012 - #reset-cells: should be set to <1> - the system controller is also a
0013 reset line provider
0014
0015 Example:
0016
0017 syscon: syscon@1e6e2000 {
0018 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
0019 reg = <0x1e6e2000 0x1a8>;
0020 #clock-cells = <1>;
0021 #reset-cells = <1>;
0022 };
0023
0024 Silicon ID
0025 -----------------
0026
0027 Families have unique hardware silicon identifiers within the SoC.
0028
0029 Required properties:
0030
0031 - compatible: "aspeed,silicon-id" or:
0032 "aspeed,ast2400-silicon-id" or
0033 "aspeed,ast2500-silicon-id" or
0034 "aspeed,ast2600-silicon-id"
0035
0036 - reg: offset and length of the silicon id information
0037 optionally, a second offset and length describes the unique chip id
0038
0039 The reg should be the unique silicon id register, and
0040 not backwards compatible one in eg. the 2600.
0041
0042 Example:
0043
0044
0045 silicon-id@7c {
0046 compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
0047 reg = <0x7c 0x4 0x150 0x8>;
0048 };
