0001 # SPDX-License-Identifier: GPL-2.0+
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A23 PRCM Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 deprecated: true
0014
0015 properties:
0016 compatible:
0017 const: allwinner,sun8i-a23-prcm
0018
0019 reg:
0020 maxItems: 1
0021
0022 patternProperties:
0023 "^.*(clk|rst|codec).*$":
0024 type: object
0025
0026 properties:
0027 compatible:
0028 enum:
0029 - fixed-factor-clock
0030 - allwinner,sun8i-a23-apb0-clk
0031 - allwinner,sun8i-a23-apb0-gates-clk
0032 - allwinner,sun6i-a31-clock-reset
0033 - allwinner,sun8i-a23-codec-analog
0034
0035 required:
0036 - compatible
0037
0038 allOf:
0039 - if:
0040 properties:
0041 compatible:
0042 contains:
0043 const: allwinner,sun8i-a23-apb0-clk
0044
0045 then:
0046 properties:
0047 "#clock-cells":
0048 const: 0
0049
0050 # Already checked in the main schema
0051 compatible: true
0052
0053 clocks:
0054 maxItems: 1
0055
0056 clock-output-names:
0057 maxItems: 1
0058
0059 phandle: true
0060
0061 required:
0062 - "#clock-cells"
0063 - compatible
0064 - clocks
0065 - clock-output-names
0066
0067 additionalProperties: false
0068
0069 - if:
0070 properties:
0071 compatible:
0072 contains:
0073 const: allwinner,sun8i-a23-apb0-gates-clk
0074
0075 then:
0076 properties:
0077 "#clock-cells":
0078 const: 1
0079 description: >
0080 This additional argument passed to that clock is the
0081 offset of the bit controlling this particular gate in
0082 the register.
0083
0084 # Already checked in the main schema
0085 compatible: true
0086
0087 clocks:
0088 maxItems: 1
0089
0090 clock-output-names:
0091 minItems: 1
0092 maxItems: 32
0093
0094 phandle: true
0095
0096 required:
0097 - "#clock-cells"
0098 - compatible
0099 - clocks
0100 - clock-output-names
0101
0102 additionalProperties: false
0103
0104 - if:
0105 properties:
0106 compatible:
0107 contains:
0108 const: allwinner,sun6i-a31-clock-reset
0109
0110 then:
0111 properties:
0112 "#reset-cells":
0113 const: 1
0114
0115 # Already checked in the main schema
0116 compatible: true
0117
0118 phandle: true
0119
0120 required:
0121 - "#reset-cells"
0122 - compatible
0123
0124 additionalProperties: false
0125
0126 - if:
0127 properties:
0128 compatible:
0129 contains:
0130 const: allwinner,sun8i-a23-codec-analog
0131
0132 then:
0133 properties:
0134 # Already checked in the main schema
0135 compatible: true
0136
0137 phandle: true
0138
0139 required:
0140 - compatible
0141
0142 additionalProperties: false
0143
0144 required:
0145 - compatible
0146 - reg
0147
0148 additionalProperties: false
0149
0150 examples:
0151 - |
0152 prcm@1f01400 {
0153 compatible = "allwinner,sun8i-a23-prcm";
0154 reg = <0x01f01400 0x200>;
0155
0156 ar100: ar100_clk {
0157 compatible = "fixed-factor-clock";
0158 #clock-cells = <0>;
0159 clock-div = <1>;
0160 clock-mult = <1>;
0161 clocks = <&osc24M>;
0162 clock-output-names = "ar100";
0163 };
0164
0165 ahb0: ahb0_clk {
0166 compatible = "fixed-factor-clock";
0167 #clock-cells = <0>;
0168 clock-div = <1>;
0169 clock-mult = <1>;
0170 clocks = <&ar100>;
0171 clock-output-names = "ahb0";
0172 };
0173
0174 apb0: apb0_clk {
0175 compatible = "allwinner,sun8i-a23-apb0-clk";
0176 #clock-cells = <0>;
0177 clocks = <&ahb0>;
0178 clock-output-names = "apb0";
0179 };
0180
0181 apb0_gates: apb0_gates_clk {
0182 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
0183 #clock-cells = <1>;
0184 clocks = <&apb0>;
0185 clock-output-names = "apb0_pio", "apb0_timer",
0186 "apb0_rsb", "apb0_uart",
0187 "apb0_i2c";
0188 };
0189
0190 apb0_rst: apb0_rst {
0191 compatible = "allwinner,sun6i-a31-clock-reset";
0192 #reset-cells = <1>;
0193 };
0194
0195 codec_analog: codec-analog {
0196 compatible = "allwinner,sun8i-a23-codec-analog";
0197 };
0198 };
0199
0200 ...
