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0001 * EMIF family of TI SDRAM controllers
0002 
0003 EMIF - External Memory Interface - is an SDRAM controller used in
0004 TI SoCs. EMIF supports, based on the IP revision, one or more of
0005 DDR2/DDR3/LPDDR2 protocols. This binding describes a given instance
0006 of the EMIF IP and memory parts attached to it. Certain revisions
0007 of the EMIF controller also contain optional ECC support, which
0008 corrects one bit errors and detects two bit errors.
0009 
0010 Required properties:
0011 - compatible    : Should be of the form "ti,emif-<ip-rev>" where <ip-rev>
0012   is the IP revision of the specific EMIF instance. For newer controllers,
0013   compatible should be one of the following:
0014              "ti,emif-am3352"
0015              "ti,emif-am4372"
0016              "ti,emif-dra7xx"
0017              "ti,emif-keystone"
0018 
0019 - phy-type      : <u32> indicating the DDR phy type. Following are the
0020   allowed values
0021   <1>   : Attila PHY
0022   <2>   : Intelli PHY
0023 
0024 - device-handle : phandle to a "lpddr2" node representing the memory part
0025 
0026 - ti,hwmods     : For TI hwmods processing and omap device creation
0027   the value shall be "emif<n>" where <n> is the number of the EMIF
0028   instance with base 1.
0029 - interrupts    : interrupt used by the controller
0030 
0031 Required only for "ti,emif-am3352" and "ti,emif-am4372":
0032 - sram                  : Phandles for generic sram driver nodes,
0033   first should be type 'protect-exec' for the driver to use to copy
0034   and run PM functions, second should be regular pool to be used for
0035   data region for code. See Documentation/devicetree/bindings/sram/sram.yaml
0036   for more details.
0037 
0038 Optional properties:
0039 - cs1-used              : Have this property if CS1 of this EMIF
0040   instance has a memory part attached to it. If there is a memory
0041   part attached to CS1, it should be the same type as the one on CS0,
0042   so there is no need to give the details of this memory part.
0043 
0044 - cal-resistor-per-cs   : Have this property if the board has one
0045   calibration resistor per chip-select.
0046 
0047 - hw-caps-read-idle-ctrl: Have this property if the controller
0048   supports read idle window programming
0049 
0050 - hw-caps-dll-calib-ctrl: Have this property if the controller
0051   supports dll calibration control
0052 
0053 - hw-caps-ll-interface  : Have this property if the controller
0054   has a low latency interface and corresponding interrupt events
0055 
0056 - hw-caps-temp-alert    : Have this property if the controller
0057   has capability for generating SDRAM temperature alerts
0058 
0059 -Examples:
0060 
0061 emif1: emif@4c000000 {
0062         compatible      = "ti,emif-4d";
0063         ti,hwmods       = "emif2";
0064         phy-type        = <1>;
0065         device-handle   = <&elpida_ECB240ABACN>;
0066         cs1-used;
0067         hw-caps-read-idle-ctrl;
0068         hw-caps-ll-interface;
0069         hw-caps-temp-alert;
0070 };
0071 
0072 /* From am33xx.dtsi */
0073 emif: emif@4c000000 {
0074         compatible = "ti,emif-am3352";
0075         reg =   <0x4C000000 0x1000>;
0076         sram = <&pm_sram_code
0077                 &pm_sram_data>;
0078 };
0079 
0080 emif1: emif@4c000000 {
0081         compatible = "ti,emif-dra7xx";
0082         reg = <0x4c000000 0x200>;
0083         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
0084 };