0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas Reduced Pin Count Interface (RPC-IF)
0008
0009 maintainers:
0010 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
0011
0012 description: |
0013 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
0014 be accessed via the external address space read mode or the manual mode.
0015
0016 The flash chip itself should be represented by a subnode of the RPC-IF node.
0017 The flash interface is selected based on the "compatible" property of this
0018 subnode:
0019 - if it contains "jedec,spi-nor", then SPI is used;
0020 - if it contains "cfi-flash", then HyperFlash is used.
0021
0022 allOf:
0023 - $ref: "/schemas/spi/spi-controller.yaml#"
0024
0025 properties:
0026 compatible:
0027 oneOf:
0028 - items:
0029 - enum:
0030 - renesas,r8a774a1-rpc-if # RZ/G2M
0031 - renesas,r8a774b1-rpc-if # RZ/G2N
0032 - renesas,r8a774c0-rpc-if # RZ/G2E
0033 - renesas,r8a774e1-rpc-if # RZ/G2H
0034 - renesas,r8a7795-rpc-if # R-Car H3
0035 - renesas,r8a7796-rpc-if # R-Car M3-W
0036 - renesas,r8a77961-rpc-if # R-Car M3-W+
0037 - renesas,r8a77965-rpc-if # R-Car M3-N
0038 - renesas,r8a77970-rpc-if # R-Car V3M
0039 - renesas,r8a77980-rpc-if # R-Car V3H
0040 - renesas,r8a77990-rpc-if # R-Car E3
0041 - renesas,r8a77995-rpc-if # R-Car D3
0042 - renesas,r8a779a0-rpc-if # R-Car V3U
0043 - const: renesas,rcar-gen3-rpc-if # a generic R-Car gen3 or RZ/G2{E,H,M,N} device
0044
0045 - items:
0046 - enum:
0047 - renesas,r9a07g043-rpc-if # RZ/G2UL
0048 - renesas,r9a07g044-rpc-if # RZ/G2{L,LC}
0049 - renesas,r9a07g054-rpc-if # RZ/V2L
0050 - const: renesas,rzg2l-rpc-if
0051
0052 reg:
0053 items:
0054 - description: RPC-IF registers
0055 - description: direct mapping read mode area
0056 - description: write buffer area
0057
0058 reg-names:
0059 items:
0060 - const: regs
0061 - const: dirmap
0062 - const: wbuf
0063
0064 clocks: true
0065
0066 interrupts:
0067 maxItems: 1
0068
0069 power-domains:
0070 maxItems: 1
0071
0072 resets:
0073 maxItems: 1
0074
0075 patternProperties:
0076 "flash@[0-9a-f]+$":
0077 type: object
0078 properties:
0079 compatible:
0080 contains:
0081 enum:
0082 - cfi-flash
0083 - jedec,spi-nor
0084
0085 required:
0086 - compatible
0087 - reg
0088 - reg-names
0089 - clocks
0090 - power-domains
0091 - resets
0092 - '#address-cells'
0093 - '#size-cells'
0094
0095 if:
0096 properties:
0097 compatible:
0098 contains:
0099 enum:
0100 - renesas,rzg2l-rpc-if
0101 then:
0102 properties:
0103 clocks:
0104 items:
0105 - description: SPI Multi IO Register access clock (SPI_CLK2)
0106 - description: SPI Multi IO Main clock (SPI_CLK).
0107
0108 else:
0109 properties:
0110 clocks:
0111 maxItems: 1
0112
0113 unevaluatedProperties: false
0114
0115 examples:
0116 - |
0117 #include <dt-bindings/clock/renesas-cpg-mssr.h>
0118 #include <dt-bindings/power/r8a77995-sysc.h>
0119
0120 spi@ee200000 {
0121 compatible = "renesas,r8a77995-rpc-if", "renesas,rcar-gen3-rpc-if";
0122 reg = <0xee200000 0x200>,
0123 <0x08000000 0x4000000>,
0124 <0xee208000 0x100>;
0125 reg-names = "regs", "dirmap", "wbuf";
0126 clocks = <&cpg CPG_MOD 917>;
0127 power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
0128 resets = <&cpg 917>;
0129 #address-cells = <1>;
0130 #size-cells = <0>;
0131
0132 flash@0 {
0133 compatible = "jedec,spi-nor";
0134 reg = <0>;
0135 spi-max-frequency = <40000000>;
0136 spi-tx-bus-width = <1>;
0137 spi-rx-bus-width = <1>;
0138 };
0139 };
