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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra210-emc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: NVIDIA Tegra210 SoC External Memory Controller
0008 
0009 maintainers:
0010   - Thierry Reding <thierry.reding@gmail.com>
0011   - Jon Hunter <jonathanh@nvidia.com>
0012 
0013 description: |
0014   The EMC interfaces with the off-chip SDRAM to service the request stream
0015   sent from the memory controller.
0016 
0017 properties:
0018   compatible:
0019     const: nvidia,tegra210-emc
0020 
0021   reg:
0022     maxItems: 3
0023 
0024   clocks:
0025     items:
0026       - description: external memory clock
0027 
0028   clock-names:
0029     items:
0030       - const: emc
0031 
0032   interrupts:
0033     items:
0034       - description: EMC general interrupt
0035 
0036   memory-region:
0037     maxItems: 1
0038     description:
0039       phandle to a reserved memory region describing the table of EMC
0040       frequencies trained by the firmware
0041 
0042   nvidia,memory-controller:
0043     $ref: /schemas/types.yaml#/definitions/phandle
0044     description:
0045       phandle of the memory controller node
0046 
0047 required:
0048   - compatible
0049   - reg
0050   - clocks
0051   - clock-names
0052   - nvidia,memory-controller
0053 
0054 additionalProperties: false
0055 
0056 examples:
0057   - |
0058     #include <dt-bindings/clock/tegra210-car.h>
0059     #include <dt-bindings/interrupt-controller/arm-gic.h>
0060 
0061     reserved-memory {
0062         #address-cells = <1>;
0063         #size-cells = <1>;
0064         ranges;
0065 
0066         emc_table: emc-table@83400000 {
0067             compatible = "nvidia,tegra210-emc-table";
0068             reg = <0x83400000 0x10000>;
0069         };
0070     };
0071 
0072     external-memory-controller@7001b000 {
0073         compatible = "nvidia,tegra210-emc";
0074         reg = <0x7001b000 0x1000>,
0075               <0x7001e000 0x1000>,
0076               <0x7001f000 0x1000>;
0077         clocks = <&tegra_car TEGRA210_CLK_EMC>;
0078         clock-names = "emc";
0079         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
0080         memory-region = <&emc_table>;
0081         nvidia,memory-controller = <&mc>;
0082     };