0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra20-mc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NVIDIA Tegra20 SoC Memory Controller
0008
0009 maintainers:
0010 - Dmitry Osipenko <digetx@gmail.com>
0011 - Jon Hunter <jonathanh@nvidia.com>
0012 - Thierry Reding <thierry.reding@gmail.com>
0013
0014 description: |
0015 The Tegra20 Memory Controller merges request streams from various client
0016 interfaces into request stream(s) for the various memory target devices,
0017 and returns response data to the various clients. The Memory Controller
0018 has a configurable arbitration algorithm to allow the user to fine-tune
0019 performance among the various clients.
0020
0021 Tegra20 Memory Controller includes the GART (Graphics Address Relocation
0022 Table) which allows Memory Controller to provide a linear view of a
0023 fragmented memory pages.
0024
0025 properties:
0026 compatible:
0027 const: nvidia,tegra20-mc-gart
0028
0029 reg:
0030 items:
0031 - description: controller registers
0032 - description: GART registers
0033
0034 clocks:
0035 maxItems: 1
0036
0037 clock-names:
0038 items:
0039 - const: mc
0040
0041 interrupts:
0042 maxItems: 1
0043
0044 "#reset-cells":
0045 const: 1
0046
0047 "#iommu-cells":
0048 const: 0
0049
0050 "#interconnect-cells":
0051 const: 1
0052
0053 required:
0054 - compatible
0055 - reg
0056 - interrupts
0057 - clocks
0058 - clock-names
0059 - "#reset-cells"
0060 - "#iommu-cells"
0061 - "#interconnect-cells"
0062
0063 additionalProperties: false
0064
0065 examples:
0066 - |
0067 memory-controller@7000f000 {
0068 compatible = "nvidia,tegra20-mc-gart";
0069 reg = <0x7000f000 0x400>, /* Controller registers */
0070 <0x58000000 0x02000000>; /* GART aperture */
0071 clocks = <&clock_controller 32>;
0072 clock-names = "mc";
0073
0074 interrupts = <0 77 4>;
0075
0076 #iommu-cells = <0>;
0077 #reset-cells = <1>;
0078 #interconnect-cells = <1>;
0079 };
