bindings/memory-controllers/mediatek%2Csmi-larb.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (c) 2020 MediaTek Inc.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-larb.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: SMI (Smart Multimedia Interface) Local Arbiter
0009
0010 maintainers:
0011   - Yong Wu <yong.wu@mediatek.com>
0012
0013 description: |
0014   The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
0015
0016 properties:
0017   compatible:
0018     oneOf:
0019       - enum:
0020           - mediatek,mt2701-smi-larb
0021           - mediatek,mt2712-smi-larb
0022           - mediatek,mt6779-smi-larb
0023           - mediatek,mt6795-smi-larb
0024           - mediatek,mt8167-smi-larb
0025           - mediatek,mt8173-smi-larb
0026           - mediatek,mt8183-smi-larb
0027           - mediatek,mt8186-smi-larb
0028           - mediatek,mt8192-smi-larb
0029           - mediatek,mt8195-smi-larb
0030
0031       - description: for mt7623
0032         items:
0033           - const: mediatek,mt7623-smi-larb
0034           - const: mediatek,mt2701-smi-larb
0035
0036   reg:
0037     maxItems: 1
0038
0039   clocks:
0040     description: |
0041       apb and smi are mandatory. gals(global async local sync) is optional.
0042     minItems: 2
0043     items:
0044       - description: apb is Advanced Peripheral Bus clock, It's the clock for
0045           setting the register.
0046       - description: smi is the clock for transfer data and command.
0047       - description: the clock for gals.
0048
0049   clock-names:
0050     minItems: 2
0051     maxItems: 3
0052
0053   power-domains:
0054     maxItems: 1
0055
0056   mediatek,smi:
0057     $ref: /schemas/types.yaml#/definitions/phandle
0058     description: a phandle to the smi_common node.
0059
0060   mediatek,larb-id:
0061     $ref: /schemas/types.yaml#/definitions/uint32
0062     minimum: 0
0063     maximum: 31
0064     description: the hardware id of this larb. It's only required when this
0065       hardward id is not consecutive from its M4U point of view.
0066
0067 required:
0068   - compatible
0069   - reg
0070   - clocks
0071   - clock-names
0072   - power-domains
0073
0074 allOf:
0075   - if:  # HW has gals
0076       properties:
0077         compatible:
0078           enum:
0079             - mediatek,mt8183-smi-larb
0080             - mediatek,mt8186-smi-larb
0081             - mediatek,mt8195-smi-larb
0082
0083     then:
0084       properties:
0085         clocks:
0086           minItems: 2
0087           maxItems: 3
0088         clock-names:
0089           minItems: 2
0090           items:
0091             - const: apb
0092             - const: smi
0093             - const: gals
0094
0095     else:
0096       properties:
0097         clocks:
0098           minItems: 2
0099           maxItems: 2
0100         clock-names:
0101           items:
0102             - const: apb
0103             - const: smi
0104
0105   - if:
0106       properties:
0107         compatible:
0108           contains:
0109             enum:
0110               - mediatek,mt2701-smi-larb
0111               - mediatek,mt2712-smi-larb
0112               - mediatek,mt6779-smi-larb
0113               - mediatek,mt8186-smi-larb
0114               - mediatek,mt8192-smi-larb
0115               - mediatek,mt8195-smi-larb
0116
0117     then:
0118       required:
0119         - mediatek,larb-id
0120
0121 additionalProperties: false
0122
0123 examples:
0124   - |+
0125     #include <dt-bindings/clock/mt8173-clk.h>
0126     #include <dt-bindings/power/mt8173-power.h>
0127
0128     larb1: larb@16010000 {
0129       compatible = "mediatek,mt8173-smi-larb";
0130       reg = <0x16010000 0x1000>;
0131       mediatek,smi = <&smi_common>;
0132       power-domains = <&scpsys MT8173_POWER_DOMAIN_VDEC>;
0133       clocks = <&vdecsys CLK_VDEC_CKEN>,
0134                <&vdecsys CLK_VDEC_LARB_CKEN>;
0135       clock-names = "apb", "smi";
0136     };