bindings/memory-controllers/mediatek%2Csmi-common.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (c) 2020 MediaTek Inc.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/memory-controllers/mediatek,smi-common.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: SMI (Smart Multimedia Interface) Common
0009
0010 maintainers:
0011   - Yong Wu <yong.wu@mediatek.com>
0012
0013 description: |
0014   The hardware block diagram please check bindings/iommu/mediatek,iommu.yaml
0015
0016   MediaTek SMI have two generations of HW architecture, here is the list
0017   which generation the SoCs use:
0018   generation 1: mt2701 and mt7623.
0019   generation 2: mt2712, mt6779, mt8167, mt8173, mt8183, mt8186, mt8192 and mt8195.
0020
0021   There's slight differences between the two SMI, for generation 2, the
0022   register which control the iommu port is at each larb's register base. But
0023   for generation 1, the register is at smi ao base(smi always on register
0024   base). Besides that, the smi async clock should be prepared and enabled for
0025   SMI generation 1 to transform the smi clock into emi clock domain, but that is
0026   not needed for SMI generation 2.
0027
0028 properties:
0029   compatible:
0030     oneOf:
0031       - enum:
0032           - mediatek,mt2701-smi-common
0033           - mediatek,mt2712-smi-common
0034           - mediatek,mt6779-smi-common
0035           - mediatek,mt6795-smi-common
0036           - mediatek,mt8167-smi-common
0037           - mediatek,mt8173-smi-common
0038           - mediatek,mt8183-smi-common
0039           - mediatek,mt8186-smi-common
0040           - mediatek,mt8192-smi-common
0041           - mediatek,mt8195-smi-common-vdo
0042           - mediatek,mt8195-smi-common-vpp
0043           - mediatek,mt8195-smi-sub-common
0044
0045       - description: for mt7623
0046         items:
0047           - const: mediatek,mt7623-smi-common
0048           - const: mediatek,mt2701-smi-common
0049
0050   reg:
0051     maxItems: 1
0052
0053   power-domains:
0054     maxItems: 1
0055
0056   clocks:
0057     description: |
0058       apb and smi are mandatory. the async is only for generation 1 smi HW.
0059       gals(global async local sync) also is optional, see below.
0060     minItems: 2
0061     items:
0062       - description: apb is Advanced Peripheral Bus clock, It's the clock for
0063           setting the register.
0064       - description: smi is the clock for transfer data and command.
0065       - description: Either asynchronous clock to help transform the smi clock
0066           into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
0067       - description: gals1 is the path1 clock of gals.
0068
0069   clock-names:
0070     minItems: 2
0071     maxItems: 4
0072
0073   mediatek,smi:
0074     $ref: /schemas/types.yaml#/definitions/phandle
0075     description: a phandle to the smi-common node above. Only for sub-common.
0076
0077 required:
0078   - compatible
0079   - reg
0080   - power-domains
0081   - clocks
0082   - clock-names
0083
0084 allOf:
0085   - if:  # only for gen1 HW
0086       properties:
0087         compatible:
0088           contains:
0089             enum:
0090               - mediatek,mt2701-smi-common
0091     then:
0092       properties:
0093         clocks:
0094           minItems: 3
0095           maxItems: 3
0096         clock-names:
0097           items:
0098             - const: apb
0099             - const: smi
0100             - const: async
0101
0102   - if:  # only for sub common
0103       properties:
0104         compatible:
0105           contains:
0106             enum:
0107               - mediatek,mt8195-smi-sub-common
0108     then:
0109       required:
0110         - mediatek,smi
0111       properties:
0112         clocks:
0113           minItems: 3
0114           maxItems: 3
0115         clock-names:
0116           items:
0117             - const: apb
0118             - const: smi
0119             - const: gals0
0120     else:
0121       properties:
0122         mediatek,smi: false
0123
0124   - if:  # for gen2 HW that have gals
0125       properties:
0126         compatible:
0127           enum:
0128             - mediatek,mt6779-smi-common
0129             - mediatek,mt8183-smi-common
0130             - mediatek,mt8186-smi-common
0131             - mediatek,mt8192-smi-common
0132             - mediatek,mt8195-smi-common-vdo
0133             - mediatek,mt8195-smi-common-vpp
0134
0135     then:
0136       properties:
0137         clocks:
0138           minItems: 4
0139           maxItems: 4
0140         clock-names:
0141           items:
0142             - const: apb
0143             - const: smi
0144             - const: gals0
0145             - const: gals1
0146
0147     else:  # for gen2 HW that don't have gals
0148       properties:
0149         clocks:
0150           minItems: 2
0151           maxItems: 2
0152         clock-names:
0153           items:
0154             - const: apb
0155             - const: smi
0156
0157 additionalProperties: false
0158
0159 examples:
0160   - |+
0161     #include <dt-bindings/clock/mt8173-clk.h>
0162     #include <dt-bindings/power/mt8173-power.h>
0163
0164     smi_common: smi@14022000 {
0165             compatible = "mediatek,mt8173-smi-common";
0166             reg = <0x14022000 0x1000>;
0167             power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
0168             clocks = <&mmsys CLK_MM_SMI_COMMON>,
0169                      <&mmsys CLK_MM_SMI_COMMON>;
0170             clock-names = "apb", "smi";
0171     };