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0001 Texas Instruments VPIF
0002 ----------------------
0003 
0004 The TI Video Port InterFace (VPIF) is the primary component for video
0005 capture and display on the DA850/AM18x family of TI DaVinci/Sitara
0006 SoCs.
0007 
0008 TI Document reference: SPRUH82C, Chapter 35
0009 http://www.ti.com/lit/pdf/spruh82
0010 
0011 Required properties:
0012 - compatible: must be "ti,da850-vpif"
0013 - reg: physical base address and length of the registers set for the device;
0014 - interrupts: should contain IRQ line for the VPIF
0015 
0016 Video Capture:
0017 
0018 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
0019 single 16-bit channel. It should contain one or two port child nodes
0020 with child 'endpoint' node. If there are two ports then port@0 must
0021 describe the input and port@1 output channels. Please refer to the
0022 bindings defined in
0023 Documentation/devicetree/bindings/media/video-interfaces.txt.
0024 
0025 Example using 2 8-bit input channels, one of which is connected to an
0026 I2C-connected TVP5147 decoder:
0027 
0028         vpif: vpif@217000 {
0029                 compatible = "ti,da850-vpif";
0030                 reg = <0x217000 0x1000>;
0031                 interrupts = <92>;
0032 
0033                 port@0 {
0034                         vpif_input_ch0: endpoint@0 {
0035                                 reg = <0>;
0036                                 bus-width = <8>;
0037                                 remote-endpoint = <&composite_in>;
0038                         };
0039 
0040                         vpif_input_ch1: endpoint@1 {
0041                                 reg = <1>;
0042                                 bus-width = <8>;
0043                                 data-shift = <8>;
0044                         };
0045                 };
0046 
0047                 port@1 {
0048                         vpif_output_ch0: endpoint {
0049                                 bus-width = <8>;
0050                                 remote-endpoint = <&composite_out>;
0051                         };
0052                 };
0053         };
0054 
0055 [ ... ]
0056 
0057 &i2c0 {
0058 
0059         tvp5147@5d {
0060                 compatible = "ti,tvp5147";
0061                 reg = <0x5d>;
0062 
0063                 port {
0064                         composite_in: endpoint {
0065                                 hsync-active = <1>;
0066                                 vsync-active = <1>;
0067                                 pclk-sample = <0>;
0068 
0069                                 /* VPIF channel 0 (lower 8-bits) */
0070                                 remote-endpoint = <&vpif_input_ch0>;
0071                                 bus-width = <8>;
0072                         };
0073                 };
0074         };
0075 
0076         adv7343@2a {
0077                 compatible = "adi,adv7343";
0078                 reg = <0x2a>;
0079 
0080                 port {
0081                         composite_out: endpoint {
0082                                 adi,dac-enable = <1 1 1>;
0083                                 adi,sd-dac-enable = <1>;
0084 
0085                                 remote-endpoint = <&vpif_output_ch0>;
0086                                 bus-width = <8>;
0087                         };
0088                 };
0089         };
0090 };
0091 
0092 
0093 Alternatively, an example when the bus is configured as a single
0094 16-bit input (e.g. for raw-capture mode):
0095 
0096         vpif: vpif@217000 {
0097                 compatible = "ti,da850-vpif";
0098                 reg = <0x217000 0x1000>;
0099                 interrupts = <92>;
0100 
0101                 port {
0102                         vpif_ch0: endpoint {
0103                                   bus-width = <16>;
0104                         };
0105                 };
0106         };