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0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/media/st,stm32-dcmi.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: STMicroelectronics STM32 Digital Camera Memory Interface (DCMI) binding
0008 
0009 maintainers:
0010   - Hugues Fruchet <hugues.fruchet@foss.st.com>
0011 
0012 properties:
0013   compatible:
0014     const: st,stm32-dcmi
0015 
0016   reg:
0017     maxItems: 1
0018 
0019   interrupts:
0020     maxItems: 1
0021 
0022   clocks:
0023     maxItems: 1
0024 
0025   clock-names:
0026     items:
0027       - const: mclk
0028 
0029   dmas:
0030     maxItems: 1
0031 
0032   dma-names:
0033     items:
0034       - const: tx
0035 
0036   resets:
0037     maxItems: 1
0038 
0039   port:
0040     $ref: /schemas/graph.yaml#/$defs/port-base
0041     unevaluatedProperties: false
0042     description:
0043       DCMI supports a single port node with parallel bus.
0044 
0045     properties:
0046       endpoint:
0047         $ref: video-interfaces.yaml#
0048         unevaluatedProperties: false
0049 
0050         properties:
0051           bus-type:
0052             enum: [5, 6]
0053             default: 5
0054 
0055           bus-width:
0056             enum: [8, 10, 12, 14]
0057             default: 8
0058 
0059         allOf:
0060           - if:
0061               properties:
0062                 bus-type:
0063                   const: 6
0064 
0065             then:
0066               properties:
0067                 hsync-active: false
0068                 vsync-active: false
0069                 bus-width:
0070                   enum: [8]
0071 
0072         required:
0073           - bus-type
0074           - pclk-sample
0075 
0076 required:
0077   - compatible
0078   - reg
0079   - interrupts
0080   - clocks
0081   - clock-names
0082   - resets
0083   - dmas
0084   - dma-names
0085   - port
0086 
0087 additionalProperties: false
0088 
0089 examples:
0090   - |
0091     #include <dt-bindings/interrupt-controller/arm-gic.h>
0092     #include <dt-bindings/clock/stm32mp1-clks.h>
0093     #include <dt-bindings/reset/stm32mp1-resets.h>
0094     dcmi: dcmi@4c006000 {
0095         compatible = "st,stm32-dcmi";
0096         reg = <0x4c006000 0x400>;
0097         interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
0098         resets = <&rcc CAMITF_R>;
0099         clocks = <&rcc DCMI>;
0100         clock-names = "mclk";
0101         dmas = <&dmamux1 75 0x400 0x0d>;
0102         dma-names = "tx";
0103 
0104         port {
0105              dcmi_0: endpoint {
0106                    remote-endpoint = <&ov5640_0>;
0107                    bus-type = <5>;
0108                    bus-width = <8>;
0109                    hsync-active = <0>;
0110                    vsync-active = <0>;
0111                    pclk-sample = <1>;
0112              };
0113         };
0114     };
0115 
0116 ...