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OSCL-LXR

 
 

    


0001 * Samsung Multi Format Codec (MFC)
0002 
0003 Multi Format Codec (MFC) is the IP present in Samsung SoCs which
0004 supports high resolution decoding and encoding functionalities.
0005 The MFC device driver is a v4l2 driver which can encode/decode
0006 video raw/elementary streams and has support for all popular
0007 video codecs.
0008 
0009 Required properties:
0010   - compatible : value should be either one among the following
0011         (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
0012         (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
0013         (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
0014         (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
0015         (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
0016         (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
0017 
0018   - reg : Physical base address of the IP registers and length of memory
0019           mapped region.
0020 
0021   - interrupts : MFC interrupt number to the CPU.
0022   - clocks : from common clock binding: handle to mfc clock.
0023   - clock-names : from common clock binding: must contain "mfc",
0024                   corresponding to entry in the clocks property.
0025 
0026 Optional properties:
0027   - power-domains : power-domain property defined with a phandle
0028                            to respective power domain.
0029   - memory-region : from reserved memory binding: phandles to two reserved
0030         memory regions, first is for "left" mfc memory bus interfaces,
0031         second if for the "right" mfc memory bus, used when no SYSMMU
0032         support is available; used only by MFC v5 present in Exynos4 SoCs
0033 
0034 Obsolete properties:
0035   - samsung,mfc-r, samsung,mfc-l : support removed, please use memory-region
0036         property instead
0037 
0038 
0039 Example:
0040 SoC specific DT entry:
0041 
0042 mfc: codec@13400000 {
0043         compatible = "samsung,mfc-v5";
0044         reg = <0x13400000 0x10000>;
0045         interrupts = <0 94 0>;
0046         power-domains = <&pd_mfc>;
0047         clocks = <&clock 273>;
0048         clock-names = "mfc";
0049 };
0050 
0051 Reserved memory specific DT entry for given board (see reserved memory binding
0052 for more information):
0053 
0054 reserved-memory {
0055         #address-cells = <1>;
0056         #size-cells = <1>;
0057         ranges;
0058 
0059         mfc_left: region@51000000 {
0060                 compatible = "shared-dma-pool";
0061                 no-map;
0062                 reg = <0x51000000 0x800000>;
0063         };
0064 
0065         mfc_right: region@43000000 {
0066                 compatible = "shared-dma-pool";
0067                 no-map;
0068                 reg = <0x43000000 0x800000>;
0069         };
0070 };
0071 
0072 Board specific DT entry:
0073 
0074 codec@13400000 {
0075         memory-region = <&mfc_left>, <&mfc_right>;
0076 };