0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/media/qcom,sm8250-camss.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: Qualcomm CAMSS ISP
0009
0010 maintainers:
0011 - Robert Foss <robert.foss@linaro.org>
0012
0013 description: |
0014 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms.
0015
0016 properties:
0017 compatible:
0018 const: qcom,sm8250-camss
0019
0020 clocks:
0021 minItems: 37
0022 maxItems: 37
0023
0024 clock-names:
0025 items:
0026 - const: cam_ahb_clk
0027 - const: cam_hf_axi
0028 - const: cam_sf_axi
0029 - const: camnoc_axi
0030 - const: camnoc_axi_src
0031 - const: core_ahb
0032 - const: cpas_ahb
0033 - const: csiphy0
0034 - const: csiphy0_timer
0035 - const: csiphy1
0036 - const: csiphy1_timer
0037 - const: csiphy2
0038 - const: csiphy2_timer
0039 - const: csiphy3
0040 - const: csiphy3_timer
0041 - const: csiphy4
0042 - const: csiphy4_timer
0043 - const: csiphy5
0044 - const: csiphy5_timer
0045 - const: slow_ahb_src
0046 - const: vfe0_ahb
0047 - const: vfe0_axi
0048 - const: vfe0
0049 - const: vfe0_cphy_rx
0050 - const: vfe0_csid
0051 - const: vfe0_areg
0052 - const: vfe1_ahb
0053 - const: vfe1_axi
0054 - const: vfe1
0055 - const: vfe1_cphy_rx
0056 - const: vfe1_csid
0057 - const: vfe1_areg
0058 - const: vfe_lite_ahb
0059 - const: vfe_lite_axi
0060 - const: vfe_lite
0061 - const: vfe_lite_cphy_rx
0062 - const: vfe_lite_csid
0063
0064 interrupts:
0065 minItems: 14
0066 maxItems: 14
0067
0068 interrupt-names:
0069 items:
0070 - const: csiphy0
0071 - const: csiphy1
0072 - const: csiphy2
0073 - const: csiphy3
0074 - const: csiphy4
0075 - const: csiphy5
0076 - const: csid0
0077 - const: csid1
0078 - const: csid2
0079 - const: csid3
0080 - const: vfe0
0081 - const: vfe1
0082 - const: vfe_lite0
0083 - const: vfe_lite1
0084
0085 iommus:
0086 minItems: 8
0087 maxItems: 8
0088
0089 interconnects:
0090 minItems: 4
0091 maxItems: 4
0092
0093 interconnect-names:
0094 items:
0095 - const: cam_ahb
0096 - const: cam_hf_0_mnoc
0097 - const: cam_sf_0_mnoc
0098 - const: cam_sf_icp_mnoc
0099
0100 power-domains:
0101 items:
0102 - description: IFE0 GDSC - Image Front End, Global Distributed Switch Controller.
0103 - description: IFE1 GDSC - Image Front End, Global Distributed Switch Controller.
0104 - description: Titan GDSC - Titan ISP Block, Global Distributed Switch Controller.
0105
0106 ports:
0107 $ref: /schemas/graph.yaml#/properties/ports
0108
0109 description:
0110 CSI input ports.
0111
0112 properties:
0113 port@0:
0114 $ref: /schemas/graph.yaml#/$defs/port-base
0115 unevaluatedProperties: false
0116 description:
0117 Input port for receiving CSI data.
0118
0119 properties:
0120 endpoint:
0121 $ref: video-interfaces.yaml#
0122 unevaluatedProperties: false
0123
0124 properties:
0125 clock-lanes:
0126 maxItems: 1
0127
0128 data-lanes:
0129 minItems: 1
0130 maxItems: 4
0131
0132 required:
0133 - clock-lanes
0134 - data-lanes
0135
0136 port@1:
0137 $ref: /schemas/graph.yaml#/$defs/port-base
0138 unevaluatedProperties: false
0139 description:
0140 Input port for receiving CSI data.
0141
0142 properties:
0143 endpoint:
0144 $ref: video-interfaces.yaml#
0145 unevaluatedProperties: false
0146
0147 properties:
0148 clock-lanes:
0149 maxItems: 1
0150
0151 data-lanes:
0152 minItems: 1
0153 maxItems: 4
0154
0155 required:
0156 - clock-lanes
0157 - data-lanes
0158
0159 port@2:
0160 $ref: /schemas/graph.yaml#/$defs/port-base
0161 unevaluatedProperties: false
0162 description:
0163 Input port for receiving CSI data.
0164
0165 properties:
0166 endpoint:
0167 $ref: video-interfaces.yaml#
0168 unevaluatedProperties: false
0169
0170 properties:
0171 clock-lanes:
0172 maxItems: 1
0173
0174 data-lanes:
0175 minItems: 1
0176 maxItems: 4
0177
0178 required:
0179 - clock-lanes
0180 - data-lanes
0181
0182 port@3:
0183 $ref: /schemas/graph.yaml#/$defs/port-base
0184 unevaluatedProperties: false
0185 description:
0186 Input port for receiving CSI data.
0187
0188 properties:
0189 endpoint:
0190 $ref: video-interfaces.yaml#
0191 unevaluatedProperties: false
0192
0193 properties:
0194 clock-lanes:
0195 maxItems: 1
0196
0197 data-lanes:
0198 minItems: 1
0199 maxItems: 4
0200
0201 required:
0202 - clock-lanes
0203 - data-lanes
0204
0205 port@4:
0206 $ref: /schemas/graph.yaml#/$defs/port-base
0207 unevaluatedProperties: false
0208 description:
0209 Input port for receiving CSI data.
0210
0211 properties:
0212 endpoint:
0213 $ref: video-interfaces.yaml#
0214 unevaluatedProperties: false
0215
0216 properties:
0217 clock-lanes:
0218 maxItems: 1
0219
0220 data-lanes:
0221 minItems: 1
0222 maxItems: 4
0223
0224 required:
0225 - clock-lanes
0226 - data-lanes
0227
0228 port@5:
0229 $ref: /schemas/graph.yaml#/$defs/port-base
0230 unevaluatedProperties: false
0231 description:
0232 Input port for receiving CSI data.
0233
0234 properties:
0235 endpoint:
0236 $ref: video-interfaces.yaml#
0237 unevaluatedProperties: false
0238
0239 properties:
0240 clock-lanes:
0241 maxItems: 1
0242
0243 data-lanes:
0244 minItems: 1
0245 maxItems: 4
0246
0247 required:
0248 - clock-lanes
0249 - data-lanes
0250
0251 reg:
0252 minItems: 10
0253 maxItems: 10
0254
0255 reg-names:
0256 items:
0257 - const: csiphy0
0258 - const: csiphy1
0259 - const: csiphy2
0260 - const: csiphy3
0261 - const: csiphy4
0262 - const: csiphy5
0263 - const: vfe0
0264 - const: vfe1
0265 - const: vfe_lite0
0266 - const: vfe_lite1
0267
0268 vdda-phy-supply:
0269 description:
0270 Phandle to a regulator supply to PHY core block.
0271
0272 vdda-pll-supply:
0273 description:
0274 Phandle to 1.8V regulator supply to PHY refclk pll block.
0275
0276 required:
0277 - clock-names
0278 - clocks
0279 - compatible
0280 - interconnects
0281 - interconnect-names
0282 - interrupts
0283 - interrupt-names
0284 - iommus
0285 - power-domains
0286 - reg
0287 - reg-names
0288 - vdda-phy-supply
0289 - vdda-pll-supply
0290
0291 additionalProperties: false
0292
0293 examples:
0294 - |
0295 #include <dt-bindings/interrupt-controller/arm-gic.h>
0296 #include <dt-bindings/clock/qcom,camcc-sm8250.h>
0297 #include <dt-bindings/interconnect/qcom,sm8250.h>
0298 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
0299 #include <dt-bindings/power/qcom-rpmpd.h>
0300
0301 soc {
0302 #address-cells = <2>;
0303 #size-cells = <2>;
0304
0305 camss: camss@ac6a000 {
0306 compatible = "qcom,sm8250-camss";
0307
0308 reg = <0 0xac6a000 0 0x2000>,
0309 <0 0xac6c000 0 0x2000>,
0310 <0 0xac6e000 0 0x1000>,
0311 <0 0xac70000 0 0x1000>,
0312 <0 0xac72000 0 0x1000>,
0313 <0 0xac74000 0 0x1000>,
0314 <0 0xacb4000 0 0xd000>,
0315 <0 0xacc3000 0 0xd000>,
0316 <0 0xacd9000 0 0x2200>,
0317 <0 0xacdb200 0 0x2200>;
0318 reg-names = "csiphy0",
0319 "csiphy1",
0320 "csiphy2",
0321 "csiphy3",
0322 "csiphy4",
0323 "csiphy5",
0324 "vfe0",
0325 "vfe1",
0326 "vfe_lite0",
0327 "vfe_lite1";
0328
0329 vdda-phy-supply = <&vreg_l5a_0p88>;
0330 vdda-pll-supply = <&vreg_l9a_1p2>;
0331
0332 interrupts = <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>,
0333 <GIC_SPI 478 IRQ_TYPE_LEVEL_HIGH>,
0334 <GIC_SPI 479 IRQ_TYPE_LEVEL_HIGH>,
0335 <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
0336 <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
0337 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
0338 <GIC_SPI 464 IRQ_TYPE_LEVEL_HIGH>,
0339 <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>,
0340 <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>,
0341 <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>,
0342 <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>,
0343 <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>,
0344 <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>,
0345 <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
0346 interrupt-names = "csiphy0",
0347 "csiphy1",
0348 "csiphy2",
0349 "csiphy3",
0350 "csiphy4",
0351 "csiphy5",
0352 "csid0",
0353 "csid1",
0354 "csid2",
0355 "csid3",
0356 "vfe0",
0357 "vfe1",
0358 "vfe_lite0",
0359 "vfe_lite1";
0360
0361 power-domains = <&camcc IFE_0_GDSC>,
0362 <&camcc IFE_1_GDSC>,
0363 <&camcc TITAN_TOP_GDSC>;
0364
0365 clocks = <&gcc GCC_CAMERA_AHB_CLK>,
0366 <&gcc GCC_CAMERA_HF_AXI_CLK>,
0367 <&gcc GCC_CAMERA_SF_AXI_CLK>,
0368 <&camcc CAM_CC_CAMNOC_AXI_CLK>,
0369 <&camcc CAM_CC_CAMNOC_AXI_CLK_SRC>,
0370 <&camcc CAM_CC_CORE_AHB_CLK>,
0371 <&camcc CAM_CC_CPAS_AHB_CLK>,
0372 <&camcc CAM_CC_CSIPHY0_CLK>,
0373 <&camcc CAM_CC_CSI0PHYTIMER_CLK>,
0374 <&camcc CAM_CC_CSIPHY1_CLK>,
0375 <&camcc CAM_CC_CSI1PHYTIMER_CLK>,
0376 <&camcc CAM_CC_CSIPHY2_CLK>,
0377 <&camcc CAM_CC_CSI2PHYTIMER_CLK>,
0378 <&camcc CAM_CC_CSIPHY3_CLK>,
0379 <&camcc CAM_CC_CSI3PHYTIMER_CLK>,
0380 <&camcc CAM_CC_CSIPHY4_CLK>,
0381 <&camcc CAM_CC_CSI4PHYTIMER_CLK>,
0382 <&camcc CAM_CC_CSIPHY5_CLK>,
0383 <&camcc CAM_CC_CSI5PHYTIMER_CLK>,
0384 <&camcc CAM_CC_SLOW_AHB_CLK_SRC>,
0385 <&camcc CAM_CC_IFE_0_AHB_CLK>,
0386 <&camcc CAM_CC_IFE_0_AXI_CLK>,
0387 <&camcc CAM_CC_IFE_0_CLK>,
0388 <&camcc CAM_CC_IFE_0_CPHY_RX_CLK>,
0389 <&camcc CAM_CC_IFE_0_CSID_CLK>,
0390 <&camcc CAM_CC_IFE_0_AREG_CLK>,
0391 <&camcc CAM_CC_IFE_1_AHB_CLK>,
0392 <&camcc CAM_CC_IFE_1_AXI_CLK>,
0393 <&camcc CAM_CC_IFE_1_CLK>,
0394 <&camcc CAM_CC_IFE_1_CPHY_RX_CLK>,
0395 <&camcc CAM_CC_IFE_1_CSID_CLK>,
0396 <&camcc CAM_CC_IFE_1_AREG_CLK>,
0397 <&camcc CAM_CC_IFE_LITE_AHB_CLK>,
0398 <&camcc CAM_CC_IFE_LITE_AXI_CLK>,
0399 <&camcc CAM_CC_IFE_LITE_CLK>,
0400 <&camcc CAM_CC_IFE_LITE_CPHY_RX_CLK>,
0401 <&camcc CAM_CC_IFE_LITE_CSID_CLK>;
0402 clock-names = "cam_ahb_clk",
0403 "cam_hf_axi",
0404 "cam_sf_axi",
0405 "camnoc_axi",
0406 "camnoc_axi_src",
0407 "core_ahb",
0408 "cpas_ahb",
0409 "csiphy0",
0410 "csiphy0_timer",
0411 "csiphy1",
0412 "csiphy1_timer",
0413 "csiphy2",
0414 "csiphy2_timer",
0415 "csiphy3",
0416 "csiphy3_timer",
0417 "csiphy4",
0418 "csiphy4_timer",
0419 "csiphy5",
0420 "csiphy5_timer",
0421 "slow_ahb_src",
0422 "vfe0_ahb",
0423 "vfe0_axi",
0424 "vfe0",
0425 "vfe0_cphy_rx",
0426 "vfe0_csid",
0427 "vfe0_areg",
0428 "vfe1_ahb",
0429 "vfe1_axi",
0430 "vfe1",
0431 "vfe1_cphy_rx",
0432 "vfe1_csid",
0433 "vfe1_areg",
0434 "vfe_lite_ahb",
0435 "vfe_lite_axi",
0436 "vfe_lite",
0437 "vfe_lite_cphy_rx",
0438 "vfe_lite_csid";
0439
0440 iommus = <&apps_smmu 0x800 0x400>,
0441 <&apps_smmu 0x801 0x400>,
0442 <&apps_smmu 0x840 0x400>,
0443 <&apps_smmu 0x841 0x400>,
0444 <&apps_smmu 0xC00 0x400>,
0445 <&apps_smmu 0xC01 0x400>,
0446 <&apps_smmu 0xC40 0x400>,
0447 <&apps_smmu 0xC41 0x400>;
0448
0449 interconnects = <&gem_noc MASTER_AMPSS_M0 &config_noc SLAVE_CAMERA_CFG>,
0450 <&mmss_noc MASTER_CAMNOC_HF &mc_virt SLAVE_EBI_CH0>,
0451 <&mmss_noc MASTER_CAMNOC_SF &mc_virt SLAVE_EBI_CH0>,
0452 <&mmss_noc MASTER_CAMNOC_ICP &mc_virt SLAVE_EBI_CH0>;
0453 interconnect-names = "cam_ahb",
0454 "cam_hf_0_mnoc",
0455 "cam_sf_0_mnoc",
0456 "cam_sf_icp_mnoc";
0457
0458 ports {
0459 #address-cells = <1>;
0460 #size-cells = <0>;
0461 };
0462 };
0463 };
