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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/media/qcom,sdm660-venus.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007 
0008 title: Qualcomm Venus video encode and decode accelerators
0009 
0010 maintainers:
0011   - Stanimir Varbanov <stanimir.varbanov@linaro.org>
0012   - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
0013 
0014 description: |
0015   The Venus IP is a video encode and decode accelerator present
0016   on Qualcomm platforms
0017 
0018 properties:
0019   compatible:
0020     const: qcom,sdm660-venus
0021 
0022   reg:
0023     maxItems: 1
0024 
0025   clocks:
0026     maxItems: 4
0027 
0028   clock-names:
0029     items:
0030       - const: core
0031       - const: iface
0032       - const: bus
0033       - const: bus_throttle
0034 
0035   interconnects:
0036     maxItems: 2
0037 
0038   interconnect-names:
0039     items:
0040       - const: cpu-cfg
0041       - const: video-mem
0042 
0043   interrupts:
0044     maxItems: 1
0045 
0046   iommus:
0047     maxItems: 20
0048 
0049   memory-region:
0050     maxItems: 1
0051 
0052   power-domains:
0053     maxItems: 1
0054 
0055   video-decoder:
0056     type: object
0057 
0058     properties:
0059       compatible:
0060         const: venus-decoder
0061 
0062       clocks:
0063         maxItems: 1
0064 
0065       clock-names:
0066         items:
0067           - const: vcodec0_core
0068 
0069       power-domains:
0070         maxItems: 1
0071 
0072     required:
0073       - compatible
0074       - clocks
0075       - clock-names
0076       - power-domains
0077 
0078     additionalProperties: false
0079 
0080   video-encoder:
0081     type: object
0082 
0083     properties:
0084       compatible:
0085         const: venus-encoder
0086 
0087       clocks:
0088         maxItems: 1
0089 
0090       clock-names:
0091         items:
0092           - const: vcodec0_core
0093 
0094       power-domains:
0095         maxItems: 1
0096 
0097     required:
0098       - compatible
0099       - clocks
0100       - clock-names
0101       - power-domains
0102 
0103     additionalProperties: false
0104 
0105   video-firmware:
0106     type: object
0107 
0108     description: |
0109       Firmware subnode is needed when the platform does not
0110       have TrustZone.
0111 
0112     properties:
0113       iommus:
0114         maxItems: 1
0115 
0116     required:
0117       - iommus
0118 
0119 required:
0120   - compatible
0121   - reg
0122   - clocks
0123   - clock-names
0124   - interrupts
0125   - iommus
0126   - memory-region
0127   - power-domains
0128   - video-decoder
0129   - video-encoder
0130 
0131 additionalProperties: false
0132 
0133 examples:
0134   - |
0135         #include <dt-bindings/clock/qcom,mmcc-sdm660.h>
0136         #include <dt-bindings/interrupt-controller/arm-gic.h>
0137 
0138         video-codec@cc00000 {
0139                 compatible = "qcom,sdm660-venus";
0140                 reg = <0x0cc00000 0xff000>;
0141                 clocks = <&mmcc VIDEO_CORE_CLK>,
0142                          <&mmcc VIDEO_AHB_CLK>,
0143                          <&mmcc VIDEO_AXI_CLK>,
0144                          <&mmcc THROTTLE_VIDEO_AXI_CLK>;
0145                 clock-names = "core", "iface", "bus", "bus_throttle";
0146                 interconnects = <&gnoc 0 &mnoc 13>,
0147                                 <&mnoc 4 &bimc 5>;
0148                 interconnect-names = "cpu-cfg", "video-mem";
0149                 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0150                 iommus = <&mmss_smmu 0x400>,
0151                          <&mmss_smmu 0x401>,
0152                          <&mmss_smmu 0x40a>,
0153                          <&mmss_smmu 0x407>,
0154                          <&mmss_smmu 0x40e>,
0155                          <&mmss_smmu 0x40f>,
0156                          <&mmss_smmu 0x408>,
0157                          <&mmss_smmu 0x409>,
0158                          <&mmss_smmu 0x40b>,
0159                          <&mmss_smmu 0x40c>,
0160                          <&mmss_smmu 0x40d>,
0161                          <&mmss_smmu 0x410>,
0162                          <&mmss_smmu 0x421>,
0163                          <&mmss_smmu 0x428>,
0164                          <&mmss_smmu 0x429>,
0165                          <&mmss_smmu 0x42b>,
0166                          <&mmss_smmu 0x42c>,
0167                          <&mmss_smmu 0x42d>,
0168                          <&mmss_smmu 0x411>,
0169                          <&mmss_smmu 0x431>;
0170                 memory-region = <&venus_region>;
0171                 power-domains = <&mmcc VENUS_GDSC>;
0172 
0173                 video-decoder {
0174                         compatible = "venus-decoder";
0175                         clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
0176                         clock-names = "vcodec0_core";
0177                         power-domains = <&mmcc VENUS_CORE0_GDSC>;
0178                 };
0179 
0180                 video-encoder {
0181                         compatible = "venus-encoder";
0182                         clocks = <&mmcc VIDEO_SUBCORE0_CLK>;
0183                         clock-names = "vcodec0_core";
0184                         power-domains = <&mmcc VENUS_CORE0_GDSC>;
0185                 };
0186         };