0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/media/qcom,msm8996-camss.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: Qualcomm CAMSS ISP
0009
0010 maintainers:
0011 - Robert Foss <robert.foss@linaro.org>
0012 - Todor Tomov <todor.too@gmail.com>
0013
0014 description: |
0015 The CAMSS IP is a CSI decoder and ISP present on Qualcomm platforms
0016
0017 properties:
0018 compatible:
0019 const: qcom,msm8996-camss
0020
0021 clocks:
0022 minItems: 36
0023 maxItems: 36
0024
0025 clock-names:
0026 items:
0027 - const: top_ahb
0028 - const: ispif_ahb
0029 - const: csiphy0_timer
0030 - const: csiphy1_timer
0031 - const: csiphy2_timer
0032 - const: csi0_ahb
0033 - const: csi0
0034 - const: csi0_phy
0035 - const: csi0_pix
0036 - const: csi0_rdi
0037 - const: csi1_ahb
0038 - const: csi1
0039 - const: csi1_phy
0040 - const: csi1_pix
0041 - const: csi1_rdi
0042 - const: csi2_ahb
0043 - const: csi2
0044 - const: csi2_phy
0045 - const: csi2_pix
0046 - const: csi2_rdi
0047 - const: csi3_ahb
0048 - const: csi3
0049 - const: csi3_phy
0050 - const: csi3_pix
0051 - const: csi3_rdi
0052 - const: ahb
0053 - const: vfe0
0054 - const: csi_vfe0
0055 - const: vfe0_ahb
0056 - const: vfe0_stream
0057 - const: vfe1
0058 - const: csi_vfe1
0059 - const: vfe1_ahb
0060 - const: vfe1_stream
0061 - const: vfe_ahb
0062 - const: vfe_axi
0063
0064 interrupts:
0065 minItems: 10
0066 maxItems: 10
0067
0068 interrupt-names:
0069 items:
0070 - const: csiphy0
0071 - const: csiphy1
0072 - const: csiphy2
0073 - const: csid0
0074 - const: csid1
0075 - const: csid2
0076 - const: csid3
0077 - const: ispif
0078 - const: vfe0
0079 - const: vfe1
0080
0081 iommus:
0082 maxItems: 4
0083
0084 power-domains:
0085 items:
0086 - description: VFE0 GDSC - Video Front End, Global Distributed Switch Controller.
0087 - description: VFE1 GDSC - Video Front End, Global Distributed Switch Controller.
0088
0089 ports:
0090 $ref: /schemas/graph.yaml#/properties/ports
0091
0092 description:
0093 CSI input ports.
0094
0095 properties:
0096 port@0:
0097 $ref: /schemas/graph.yaml#/$defs/port-base
0098 unevaluatedProperties: false
0099 description:
0100 Input port for receiving CSI data.
0101
0102 properties:
0103 endpoint:
0104 $ref: video-interfaces.yaml#
0105 unevaluatedProperties: false
0106
0107 properties:
0108 data-lanes:
0109 description:
0110 An array of physical data lanes indexes.
0111 Position of an entry determines the logical
0112 lane number, while the value of an entry
0113 indicates physical lane index. Lane swapping
0114 is supported. Physical lane indexes are;
0115 0, 1, 2, 3
0116 minItems: 1
0117 maxItems: 4
0118
0119 required:
0120 - data-lanes
0121
0122 port@1:
0123 $ref: /schemas/graph.yaml#/$defs/port-base
0124 unevaluatedProperties: false
0125 description:
0126 Input port for receiving CSI data.
0127
0128 properties:
0129 endpoint:
0130 $ref: video-interfaces.yaml#
0131 unevaluatedProperties: false
0132
0133 properties:
0134 data-lanes:
0135 minItems: 1
0136 maxItems: 4
0137
0138 required:
0139 - data-lanes
0140
0141 port@2:
0142 $ref: /schemas/graph.yaml#/$defs/port-base
0143 unevaluatedProperties: false
0144 description:
0145 Input port for receiving CSI data.
0146
0147 properties:
0148 endpoint:
0149 $ref: video-interfaces.yaml#
0150 unevaluatedProperties: false
0151
0152 properties:
0153 data-lanes:
0154 minItems: 1
0155 maxItems: 4
0156
0157 required:
0158 - data-lanes
0159
0160 port@3:
0161 $ref: /schemas/graph.yaml#/$defs/port-base
0162 unevaluatedProperties: false
0163 description:
0164 Input port for receiving CSI data.
0165
0166 properties:
0167 endpoint:
0168 $ref: video-interfaces.yaml#
0169 unevaluatedProperties: false
0170
0171 properties:
0172 data-lanes:
0173 minItems: 1
0174 maxItems: 4
0175
0176 required:
0177 - data-lanes
0178
0179 reg:
0180 minItems: 14
0181 maxItems: 14
0182
0183 reg-names:
0184 items:
0185 - const: csiphy0
0186 - const: csiphy0_clk_mux
0187 - const: csiphy1
0188 - const: csiphy1_clk_mux
0189 - const: csiphy2
0190 - const: csiphy2_clk_mux
0191 - const: csid0
0192 - const: csid1
0193 - const: csid2
0194 - const: csid3
0195 - const: ispif
0196 - const: csi_clk_mux
0197 - const: vfe0
0198 - const: vfe1
0199
0200 vdda-supply:
0201 description:
0202 Definition of the regulator used as analog power supply.
0203
0204 required:
0205 - clock-names
0206 - clocks
0207 - compatible
0208 - interrupt-names
0209 - interrupts
0210 - iommus
0211 - power-domains
0212 - reg
0213 - reg-names
0214 - vdda-supply
0215
0216 additionalProperties: false
0217
0218 examples:
0219 - |
0220 #include <dt-bindings/interrupt-controller/arm-gic.h>
0221 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
0222 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
0223
0224 camss: camss@a00000 {
0225 compatible = "qcom,msm8996-camss";
0226
0227 clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
0228 <&mmcc CAMSS_ISPIF_AHB_CLK>,
0229 <&mmcc CAMSS_CSI0PHYTIMER_CLK>,
0230 <&mmcc CAMSS_CSI1PHYTIMER_CLK>,
0231 <&mmcc CAMSS_CSI2PHYTIMER_CLK>,
0232 <&mmcc CAMSS_CSI0_AHB_CLK>,
0233 <&mmcc CAMSS_CSI0_CLK>,
0234 <&mmcc CAMSS_CSI0PHY_CLK>,
0235 <&mmcc CAMSS_CSI0PIX_CLK>,
0236 <&mmcc CAMSS_CSI0RDI_CLK>,
0237 <&mmcc CAMSS_CSI1_AHB_CLK>,
0238 <&mmcc CAMSS_CSI1_CLK>,
0239 <&mmcc CAMSS_CSI1PHY_CLK>,
0240 <&mmcc CAMSS_CSI1PIX_CLK>,
0241 <&mmcc CAMSS_CSI1RDI_CLK>,
0242 <&mmcc CAMSS_CSI2_AHB_CLK>,
0243 <&mmcc CAMSS_CSI2_CLK>,
0244 <&mmcc CAMSS_CSI2PHY_CLK>,
0245 <&mmcc CAMSS_CSI2PIX_CLK>,
0246 <&mmcc CAMSS_CSI2RDI_CLK>,
0247 <&mmcc CAMSS_CSI3_AHB_CLK>,
0248 <&mmcc CAMSS_CSI3_CLK>,
0249 <&mmcc CAMSS_CSI3PHY_CLK>,
0250 <&mmcc CAMSS_CSI3PIX_CLK>,
0251 <&mmcc CAMSS_CSI3RDI_CLK>,
0252 <&mmcc CAMSS_AHB_CLK>,
0253 <&mmcc CAMSS_VFE0_CLK>,
0254 <&mmcc CAMSS_CSI_VFE0_CLK>,
0255 <&mmcc CAMSS_VFE0_AHB_CLK>,
0256 <&mmcc CAMSS_VFE0_STREAM_CLK>,
0257 <&mmcc CAMSS_VFE1_CLK>,
0258 <&mmcc CAMSS_CSI_VFE1_CLK>,
0259 <&mmcc CAMSS_VFE1_AHB_CLK>,
0260 <&mmcc CAMSS_VFE1_STREAM_CLK>,
0261 <&mmcc CAMSS_VFE_AHB_CLK>,
0262 <&mmcc CAMSS_VFE_AXI_CLK>;
0263
0264 clock-names = "top_ahb",
0265 "ispif_ahb",
0266 "csiphy0_timer",
0267 "csiphy1_timer",
0268 "csiphy2_timer",
0269 "csi0_ahb",
0270 "csi0",
0271 "csi0_phy",
0272 "csi0_pix",
0273 "csi0_rdi",
0274 "csi1_ahb",
0275 "csi1",
0276 "csi1_phy",
0277 "csi1_pix",
0278 "csi1_rdi",
0279 "csi2_ahb",
0280 "csi2",
0281 "csi2_phy",
0282 "csi2_pix",
0283 "csi2_rdi",
0284 "csi3_ahb",
0285 "csi3",
0286 "csi3_phy",
0287 "csi3_pix",
0288 "csi3_rdi",
0289 "ahb",
0290 "vfe0",
0291 "csi_vfe0",
0292 "vfe0_ahb",
0293 "vfe0_stream",
0294 "vfe1",
0295 "csi_vfe1",
0296 "vfe1_ahb",
0297 "vfe1_stream",
0298 "vfe_ahb",
0299 "vfe_axi";
0300
0301 interrupts = <GIC_SPI 78 IRQ_TYPE_EDGE_RISING>,
0302 <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
0303 <GIC_SPI 80 IRQ_TYPE_EDGE_RISING>,
0304 <GIC_SPI 296 IRQ_TYPE_EDGE_RISING>,
0305 <GIC_SPI 297 IRQ_TYPE_EDGE_RISING>,
0306 <GIC_SPI 298 IRQ_TYPE_EDGE_RISING>,
0307 <GIC_SPI 299 IRQ_TYPE_EDGE_RISING>,
0308 <GIC_SPI 309 IRQ_TYPE_EDGE_RISING>,
0309 <GIC_SPI 314 IRQ_TYPE_EDGE_RISING>,
0310 <GIC_SPI 315 IRQ_TYPE_EDGE_RISING>;
0311
0312 interrupt-names = "csiphy0",
0313 "csiphy1",
0314 "csiphy2",
0315 "csid0",
0316 "csid1",
0317 "csid2",
0318 "csid3",
0319 "ispif",
0320 "vfe0",
0321 "vfe1";
0322
0323 iommus = <&vfe_smmu 0>,
0324 <&vfe_smmu 1>,
0325 <&vfe_smmu 2>,
0326 <&vfe_smmu 3>;
0327
0328 power-domains = <&mmcc VFE0_GDSC>,
0329 <&mmcc VFE1_GDSC>;
0330
0331 reg = <0x00a34000 0x1000>,
0332 <0x00a00030 0x4>,
0333 <0x00a35000 0x1000>,
0334 <0x00a00038 0x4>,
0335 <0x00a36000 0x1000>,
0336 <0x00a00040 0x4>,
0337 <0x00a30000 0x100>,
0338 <0x00a30400 0x100>,
0339 <0x00a30800 0x100>,
0340 <0x00a30c00 0x100>,
0341 <0x00a31000 0x500>,
0342 <0x00a00020 0x10>,
0343 <0x00a10000 0x1000>,
0344 <0x00a14000 0x1000>;
0345
0346 reg-names = "csiphy0",
0347 "csiphy0_clk_mux",
0348 "csiphy1",
0349 "csiphy1_clk_mux",
0350 "csiphy2",
0351 "csiphy2_clk_mux",
0352 "csid0",
0353 "csid1",
0354 "csid2",
0355 "csid3",
0356 "ispif",
0357 "csi_clk_mux",
0358 "vfe0",
0359 "vfe1";
0360
0361 vdda-supply = <®_2v8>;
0362
0363 ports {
0364 #address-cells = <1>;
0365 #size-cells = <0>;
0366 };
0367 };
