0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007
0008 title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
0009
0010 maintainers:
0011 - Philipp Zabel <p.zabel@pengutronix.de>
0012
0013 description:
0014 Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
0015
0016 properties:
0017 compatible:
0018 oneOf:
0019 - const: nxp,imx8mq-vpu
0020 deprecated: true
0021 - const: nxp,imx8mq-vpu-g1
0022 - const: nxp,imx8mq-vpu-g2
0023 - const: nxp,imx8mm-vpu-g1
0024
0025 reg:
0026 maxItems: 1
0027
0028 interrupts:
0029 maxItems: 1
0030
0031 clocks:
0032 maxItems: 1
0033
0034 power-domains:
0035 maxItems: 1
0036
0037 required:
0038 - compatible
0039 - reg
0040 - interrupts
0041 - clocks
0042
0043 additionalProperties: false
0044
0045 examples:
0046 - |
0047 #include <dt-bindings/clock/imx8mq-clock.h>
0048 #include <dt-bindings/power/imx8mq-power.h>
0049 #include <dt-bindings/interrupt-controller/arm-gic.h>
0050
0051 vpu_g1: video-codec@38300000 {
0052 compatible = "nxp,imx8mq-vpu-g1";
0053 reg = <0x38300000 0x10000>;
0054 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
0055 clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
0056 power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
0057 };
0058 - |
0059 #include <dt-bindings/clock/imx8mq-clock.h>
0060 #include <dt-bindings/power/imx8mq-power.h>
0061 #include <dt-bindings/interrupt-controller/arm-gic.h>
0062
0063 vpu_g2: video-codec@38300000 {
0064 compatible = "nxp,imx8mq-vpu-g2";
0065 reg = <0x38310000 0x10000>;
0066 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
0067 clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
0068 power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
0069 };
