0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-mipi-csi2.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner A31 MIPI CSI-2 Device Tree Bindings
0008
0009 maintainers:
0010 - Paul Kocialkowski <paul.kocialkowski@bootlin.com>
0011
0012 properties:
0013 compatible:
0014 oneOf:
0015 - const: allwinner,sun6i-a31-mipi-csi2
0016 - items:
0017 - const: allwinner,sun8i-v3s-mipi-csi2
0018 - const: allwinner,sun6i-a31-mipi-csi2
0019
0020 reg:
0021 maxItems: 1
0022
0023 interrupts:
0024 maxItems: 1
0025
0026 clocks:
0027 items:
0028 - description: Bus Clock
0029 - description: Module Clock
0030
0031 clock-names:
0032 items:
0033 - const: bus
0034 - const: mod
0035
0036 phys:
0037 maxItems: 1
0038 description: MIPI D-PHY
0039
0040 phy-names:
0041 items:
0042 - const: dphy
0043
0044 resets:
0045 maxItems: 1
0046
0047 ports:
0048 $ref: /schemas/graph.yaml#/properties/ports
0049
0050 properties:
0051 port@0:
0052 $ref: /schemas/graph.yaml#/$defs/port-base
0053 description: Input port, connect to a MIPI CSI-2 sensor
0054
0055 properties:
0056 reg:
0057 const: 0
0058
0059 endpoint:
0060 $ref: video-interfaces.yaml#
0061 unevaluatedProperties: false
0062
0063 properties:
0064 data-lanes:
0065 minItems: 1
0066 maxItems: 4
0067
0068 required:
0069 - data-lanes
0070
0071 unevaluatedProperties: false
0072
0073 port@1:
0074 $ref: /schemas/graph.yaml#/properties/port
0075 description: Output port, connect to a CSI controller
0076
0077 required:
0078 - port@0
0079 - port@1
0080
0081 required:
0082 - compatible
0083 - reg
0084 - interrupts
0085 - clocks
0086 - clock-names
0087 - phys
0088 - phy-names
0089 - resets
0090 - ports
0091
0092 additionalProperties: false
0093
0094 examples:
0095 - |
0096 #include <dt-bindings/interrupt-controller/arm-gic.h>
0097 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
0098 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
0099
0100 mipi_csi2: csi@1cb1000 {
0101 compatible = "allwinner,sun8i-v3s-mipi-csi2",
0102 "allwinner,sun6i-a31-mipi-csi2";
0103 reg = <0x01cb1000 0x1000>;
0104 interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
0105 clocks = <&ccu CLK_BUS_CSI>,
0106 <&ccu CLK_CSI1_SCLK>;
0107 clock-names = "bus", "mod";
0108 resets = <&ccu RST_BUS_CSI>;
0109
0110 phys = <&dphy>;
0111 phy-names = "dphy";
0112
0113 ports {
0114 #address-cells = <1>;
0115 #size-cells = <0>;
0116
0117 mipi_csi2_in: port@0 {
0118 reg = <0>;
0119
0120 mipi_csi2_in_ov5648: endpoint {
0121 data-lanes = <1 2 3 4>;
0122
0123 remote-endpoint = <&ov5648_out_mipi_csi2>;
0124 };
0125 };
0126
0127 mipi_csi2_out: port@1 {
0128 reg = <1>;
0129
0130 mipi_csi2_out_csi0: endpoint {
0131 remote-endpoint = <&csi0_in_mipi_csi2>;
0132 };
0133 };
0134 };
0135 };
0136
0137 ...
