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OSCL-LXR

 
 

    


0001 Rockchip mailbox
0002 
0003 The Rockchip mailbox is used by the Rockchip CPU cores to communicate
0004 requests to MCU processor.
0005 
0006 Refer to ./mailbox.txt for generic information about mailbox device-tree
0007 bindings.
0008 
0009 Required properties:
0010 
0011  - compatible: should be one of the following.
0012    - "rockchip,rk3368-mbox" for rk3368
0013  - reg: physical base address of the controller and length of memory mapped
0014         region.
0015  - interrupts: The interrupt number to the cpu. The interrupt specifier format
0016         depends on the interrupt controller.
0017  - #mbox-cells: Common mailbox binding property to identify the number
0018         of cells required for the mailbox specifier. Should be 1
0019 
0020 Example:
0021 --------
0022 
0023 /* RK3368 */
0024 mbox: mbox@ff6b0000 {
0025         compatible = "rockchip,rk3368-mailbox";
0026         reg = <0x0 0xff6b0000 0x0 0x1000>,
0027         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
0028                      <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
0029                      <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
0030                      <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
0031         #mbox-cells = <1>;
0032 };