0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/mailbox/mtk,adsp-mbox.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Mediatek ADSP mailbox
0008
0009 maintainers:
0010 - Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
0011
0012 description: |
0013 The MTK ADSP mailbox Inter-Processor Communication (IPC) enables the SoC
0014 to communicate with ADSP by passing messages through two mailbox channels.
0015 The MTK ADSP mailbox IPC also provides the ability for one processor to
0016 signal the other processor using interrupts.
0017
0018 properties:
0019 compatible:
0020 enum:
0021 - mediatek,mt8195-adsp-mbox
0022 - mediatek,mt8186-adsp-mbox
0023
0024 "#mbox-cells":
0025 const: 0
0026
0027 reg:
0028 maxItems: 1
0029
0030 interrupts:
0031 maxItems: 1
0032
0033 required:
0034 - compatible
0035 - "#mbox-cells"
0036 - reg
0037 - interrupts
0038
0039 additionalProperties: false
0040
0041 examples:
0042 - |
0043 #include <dt-bindings/interrupt-controller/arm-gic.h>
0044 #include <dt-bindings/interrupt-controller/irq.h>
0045
0046 adsp_mailbox0:mailbox@10816000 {
0047 compatible = "mediatek,mt8195-adsp-mbox";
0048 #mbox-cells = <0>;
0049 reg = <0x10816000 0x1000>;
0050 interrupts = <GIC_SPI 702 IRQ_TYPE_LEVEL_HIGH 0>;
0051 };
