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OSCL-LXR

 
 

    


0001 The PDC driver manages data transfer to and from various offload engines
0002 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
0003 one device tree entry per block.  On some chips, the PDC functionality is
0004 handled by the FA2 (Northstar Plus).
0005 
0006 Required properties:
0007 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
0008   FA2/Northstar Plus.
0009 - reg: Should contain PDC registers location and length.
0010 - interrupts: Should contain the IRQ line for the PDC.
0011 - #mbox-cells: 1
0012 - brcm,rx-status-len: Length of metadata preceding received frames, in bytes.
0013 
0014 Optional properties:
0015 - brcm,use-bcm-hdr:  present if a BCM header precedes each frame.
0016 
0017 Example:
0018         pdc0: iproc-pdc0@612c0000 {
0019                 compatible = "brcm,iproc-pdc-mbox";
0020                 reg = <0 0x612c0000 0 0x445>;  /* PDC FS0 regs */
0021                 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
0022                 #mbox-cells = <1>;   /* one cell per mailbox channel */
0023                 brcm,rx-status-len = <32>;
0024                 brcm,use-bcm-hdr;
0025         };