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OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright 2020 Unisoc Inc.
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/iommu/sprd,iommu.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007 
0008 title: Unisoc IOMMU and Multi-media MMU
0009 
0010 maintainers:
0011   - Chunyan Zhang <zhang.lyra@gmail.com>
0012 
0013 properties:
0014   compatible:
0015     enum:
0016       - sprd,iommu-v1
0017 
0018   "#iommu-cells":
0019     const: 0
0020     description:
0021       Unisoc IOMMUs are all single-master IOMMU devices, therefore no
0022       additional information needs to associate with its master device.
0023       Please refer to the generic bindings document for more details,
0024       Documentation/devicetree/bindings/iommu/iommu.txt
0025 
0026   reg:
0027     maxItems: 1
0028 
0029   clocks:
0030     description:
0031       Reference to a gate clock phandle, since access to some of IOMMUs are
0032       controlled by gate clock, but this is not required.
0033 
0034 required:
0035   - compatible
0036   - reg
0037   - "#iommu-cells"
0038 
0039 additionalProperties: false
0040 
0041 examples:
0042   - |
0043     iommu_disp: iommu@63000800 {
0044       compatible = "sprd,iommu-v1";
0045       reg = <0x63000800 0x80>;
0046       #iommu-cells = <0>;
0047     };
0048 
0049   - |
0050     iommu_jpg: iommu@62300300 {
0051       compatible = "sprd,iommu-v1";
0052       reg = <0x62300300 0x80>;
0053       #iommu-cells = <0>;
0054       clocks = <&mm_gate 1>;
0055     };
0056 
0057 ...