0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iommu/allwinner,sun50i-h6-iommu.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Allwinner H6 IOMMU Device Tree Bindings
0008
0009 maintainers:
0010 - Chen-Yu Tsai <wens@csie.org>
0011 - Maxime Ripard <mripard@kernel.org>
0012
0013 properties:
0014 "#iommu-cells":
0015 const: 1
0016 description:
0017 The content of the cell is the master ID.
0018
0019 compatible:
0020 const: allwinner,sun50i-h6-iommu
0021
0022 reg:
0023 maxItems: 1
0024
0025 interrupts:
0026 maxItems: 1
0027
0028 clocks:
0029 maxItems: 1
0030
0031 resets:
0032 maxItems: 1
0033
0034 required:
0035 - "#iommu-cells"
0036 - compatible
0037 - reg
0038 - interrupts
0039 - clocks
0040 - resets
0041
0042 additionalProperties: false
0043
0044 examples:
0045 - |
0046 #include <dt-bindings/interrupt-controller/arm-gic.h>
0047 #include <dt-bindings/interrupt-controller/irq.h>
0048
0049 #include <dt-bindings/clock/sun50i-h6-ccu.h>
0050 #include <dt-bindings/reset/sun50i-h6-ccu.h>
0051
0052 iommu: iommu@30f0000 {
0053 compatible = "allwinner,sun50i-h6-iommu";
0054 reg = <0x030f0000 0x10000>;
0055 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
0056 clocks = <&ccu CLK_BUS_IOMMU>;
0057 resets = <&ccu RST_BUS_IOMMU>;
0058 #iommu-cells = <1>;
0059 };
0060
0061 ...
