0001 Omap2/3 intc controller
0002
0003 On TI omap2 and 3 the intc interrupt controller can provide
0004 96 or 128 IRQ signals to the ARM host depending on the SoC.
0005
0006 Required Properties:
0007 - compatible: should be one of
0008 "ti,omap2-intc"
0009 "ti,omap3-intc"
0010 "ti,dm814-intc"
0011 "ti,dm816-intc"
0012 "ti,am33xx-intc"
0013
0014 - interrupt-controller : Identifies the node as an interrupt controller
0015 - #interrupt-cells : Specifies the number of cells needed to encode interrupt
0016 source, should be 1 for intc
0017 - interrupts: interrupt reference to primary interrupt controller
0018
0019 Please refer to interrupts.txt in this directory for details of the common
0020 Interrupt Controllers bindings used by client devices.
0021
0022 Example:
0023 intc: interrupt-controller@48200000 {
0024 compatible = "ti,omap3-intc";
0025 interrupt-controller;
0026 #interrupt-cells = <1>;
0027 reg = <0x48200000 0x1000>;
0028 };
