0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 # Copyright (C) Sunplus Co., Ltd. 2021
0003 %YAML 1.2
0004 ---
0005 $id: http://devicetree.org/schemas/interrupt-controller/sunplus,sp7021-intc.yaml#
0006 $schema: http://devicetree.org/meta-schemas/core.yaml#
0007
0008 title: Sunplus SP7021 SoC Interrupt Controller
0009
0010 maintainers:
0011 - Qin Jian <qinjian@cqplus1.com>
0012
0013 properties:
0014 compatible:
0015 items:
0016 - const: sunplus,sp7021-intc
0017
0018 reg:
0019 maxItems: 2
0020 description:
0021 Specifies base physical address(s) and size of the controller regs.
0022 The 1st region include type/polarity/priority/mask regs.
0023 The 2nd region include clear/masked_ext0/masked_ext1/group regs.
0024
0025 interrupt-controller: true
0026
0027 "#interrupt-cells":
0028 const: 2
0029 description:
0030 The first cell is the IRQ number, the second cell is the trigger
0031 type as defined in interrupt.txt in this directory.
0032
0033 interrupts:
0034 maxItems: 2
0035 description:
0036 EXT_INT0 & EXT_INT1, 2 interrupts references to primary interrupt
0037 controller.
0038
0039 required:
0040 - compatible
0041 - reg
0042 - interrupt-controller
0043 - "#interrupt-cells"
0044 - interrupts
0045
0046 additionalProperties: false
0047
0048 examples:
0049 - |
0050 #include <dt-bindings/interrupt-controller/arm-gic.h>
0051
0052 intc: interrupt-controller@9c000780 {
0053 compatible = "sunplus,sp7021-intc";
0054 reg = <0x9c000780 0x80>, <0x9c000a80 0x80>;
0055 interrupt-controller;
0056 #interrupt-cells = <2>;
0057 interrupt-parent = <&gic>;
0058 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>, /* EXT_INT0 */
0059 <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; /* EXT_INT1 */
0060 };
0061
0062 ...
