0001 STMicroelectronics STi System Configuration Controlled IRQs
0002 -----------------------------------------------------------
0003
0004 On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
0005 and PL310 L2 Cache IRQs are controlled using System Configuration registers.
0006 This driver is used to unmask them prior to use.
0007
0008 Required properties:
0009 - compatible : Should be set to one of:
0010 "st,stih415-irq-syscfg"
0011 "st,stih416-irq-syscfg"
0012 "st,stih407-irq-syscfg"
0013 "st,stid127-irq-syscfg"
0014 - st,syscfg : Phandle to Cortex-A9 IRQ system config registers
0015 - st,irq-device : Array of IRQs to enable - should be 2 in length
0016 - st,fiq-device : Array of FIQs to enable - should be 2 in length
0017
0018 Optional properties:
0019 - st,invert-ext : External IRQs can be inverted at will. This property inverts
0020 these IRQs using bitwise logic. A number of defines have been
0021 provided for convenience:
0022 ST_IRQ_SYSCFG_EXT_1_INV
0023 ST_IRQ_SYSCFG_EXT_2_INV
0024 ST_IRQ_SYSCFG_EXT_3_INV
0025 Example:
0026
0027 irq-syscfg {
0028 compatible = "st,stih416-irq-syscfg";
0029 st,syscfg = <&syscfg_cpu>;
0030 st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
0031 <ST_IRQ_SYSCFG_PMU_1>;
0032 st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
0033 <ST_IRQ_SYSCFG_DISABLED>;
0034 st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
0035 };
