0001 Samsung S3C24XX Interrupt Controllers
0002
0003 The S3C24XX SoCs contain a custom set of interrupt controllers providing a
0004 varying number of interrupt sources. The set consists of a main- and sub-
0005 controller and on newer SoCs even a second main controller.
0006
0007 Required properties:
0008 - compatible: Compatible property value should be "samsung,s3c2410-irq"
0009 for machines before s3c2416 and "samsung,s3c2416-irq" for s3c2416 and later.
0010
0011 - reg: Physical base address of the controller and length of memory mapped
0012 region.
0013
0014 - interrupt-controller : Identifies the node as an interrupt controller
0015
0016 - #interrupt-cells : Specifies the number of cells needed to encode an
0017 interrupt source. The value shall be 4 and interrupt descriptor shall
0018 have the following format:
0019 <ctrl_num parent_irq ctrl_irq type>
0020
0021 ctrl_num contains the controller to use:
0022 - 0 ... main controller
0023 - 1 ... sub controller
0024 - 2 ... second main controller on s3c2416 and s3c2450
0025 parent_irq contains the parent bit in the main controller and will be
0026 ignored in main controllers
0027 ctrl_irq contains the interrupt bit of the controller
0028 type contains the trigger type to use
0029
0030 Example:
0031
0032 interrupt-controller@4a000000 {
0033 compatible = "samsung,s3c2410-irq";
0034 reg = <0x4a000000 0x100>;
0035 interrupt-controller;
0036 #interrupt-cells=<4>;
0037 };
0038
0039 [...]
0040
0041 serial@50000000 {
0042 compatible = "samsung,s3c2410-uart";
0043 reg = <0x50000000 0x4000>;
0044 interrupt-parent = <&subintc>;
0045 interrupts = <1 28 0 4>, <1 28 1 4>;
0046 };
0047
0048 rtc@57000000 {
0049 compatible = "samsung,s3c2410-rtc";
0050 reg = <0x57000000 0x100>;
0051 interrupt-parent = <&intc>;
0052 interrupts = <0 30 0 3>, <0 8 0 3>;
0053 };
