0001 Microchip PIC32 Interrupt Controller
0002 ====================================
0003
0004 The Microchip PIC32 contains an Enhanced Vectored Interrupt Controller (EVIC).
0005 It handles all internal and external interrupts. This controller exists outside
0006 of the CPU and is the arbitrator of all interrupts (including interrupts from
0007 the CPU itself) before they are presented to the CPU.
0008
0009 External interrupts have a software configurable edge polarity. Non external
0010 interrupts have a type and polarity that is determined by the source of the
0011 interrupt.
0012
0013 Required properties
0014 -------------------
0015
0016 - compatible: Should be "microchip,pic32mzda-evic"
0017 - reg: Specifies physical base address and size of register range.
0018 - interrupt-controller: Identifies the node as an interrupt controller.
0019 - #interrupt cells: Specifies the number of cells used to encode an interrupt
0020 source connected to this controller. The value shall be 2 and interrupt
0021 descriptor shall have the following format:
0022
0023 <hw_irq irq_type>
0024
0025 hw_irq - represents the hardware interrupt number as in the data sheet.
0026 irq_type - is used to describe the type and polarity of an interrupt. For
0027 internal interrupts use IRQ_TYPE_EDGE_RISING for non persistent interrupts and
0028 IRQ_TYPE_LEVEL_HIGH for persistent interrupts. For external interrupts use
0029 IRQ_TYPE_EDGE_RISING or IRQ_TYPE_EDGE_FALLING to select the desired polarity.
0030
0031 Optional properties
0032 -------------------
0033 - microchip,external-irqs: u32 array of external interrupts with software
0034 polarity configuration. This array corresponds to the bits in the INTCON
0035 SFR.
0036
0037 Example
0038 -------
0039
0040 evic: interrupt-controller@1f810000 {
0041 compatible = "microchip,pic32mzda-evic";
0042 interrupt-controller;
0043 #interrupt-cells = <2>;
0044 reg = <0x1f810000 0x1000>;
0045 microchip,external-irqs = <3 8 13 18 23>;
0046 };
0047
0048 Each device/peripheral must request its interrupt line with the associated type
0049 and polarity.
0050
0051 Internal interrupt DTS snippet
0052 ------------------------------
0053
0054 device@1f800000 {
0055 ...
0056 interrupts = <113 IRQ_TYPE_LEVEL_HIGH>;
0057 ...
0058 };
0059
0060 External interrupt DTS snippet
0061 ------------------------------
0062
0063 device@1f800000 {
0064 ...
0065 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
0066 ...
0067 };
