0001 MediaTek sysirq
0002
0003 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
0004 interrupt.
0005
0006 Required properties:
0007 - compatible: should be
0008 "mediatek,mt8516-sysirq", "mediatek,mt6577-sysirq": for MT8516
0009 "mediatek,mt8183-sysirq", "mediatek,mt6577-sysirq": for MT8183
0010 "mediatek,mt8173-sysirq", "mediatek,mt6577-sysirq": for MT8173
0011 "mediatek,mt8135-sysirq", "mediatek,mt6577-sysirq": for MT8135
0012 "mediatek,mt8127-sysirq", "mediatek,mt6577-sysirq": for MT8127
0013 "mediatek,mt7622-sysirq", "mediatek,mt6577-sysirq": for MT7622
0014 "mediatek,mt7623-sysirq", "mediatek,mt6577-sysirq": for MT7623
0015 "mediatek,mt7629-sysirq", "mediatek,mt6577-sysirq": for MT7629
0016 "mediatek,mt6795-sysirq", "mediatek,mt6577-sysirq": for MT6795
0017 "mediatek,mt6797-sysirq", "mediatek,mt6577-sysirq": for MT6797
0018 "mediatek,mt6779-sysirq", "mediatek,mt6577-sysirq": for MT6779
0019 "mediatek,mt6765-sysirq", "mediatek,mt6577-sysirq": for MT6765
0020 "mediatek,mt6755-sysirq", "mediatek,mt6577-sysirq": for MT6755
0021 "mediatek,mt6592-sysirq", "mediatek,mt6577-sysirq": for MT6592
0022 "mediatek,mt6589-sysirq", "mediatek,mt6577-sysirq": for MT6589
0023 "mediatek,mt6582-sysirq", "mediatek,mt6577-sysirq": for MT6582
0024 "mediatek,mt6580-sysirq", "mediatek,mt6577-sysirq": for MT6580
0025 "mediatek,mt6577-sysirq": for MT6577
0026 "mediatek,mt2712-sysirq", "mediatek,mt6577-sysirq": for MT2712
0027 "mediatek,mt2701-sysirq", "mediatek,mt6577-sysirq": for MT2701
0028 - interrupt-controller : Identifies the node as an interrupt controller
0029 - #interrupt-cells : Use the same format as specified by GIC in arm,gic.txt.
0030 - reg: Physical base address of the intpol registers and length of memory
0031 mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
0032 need 1.
0033
0034 Example:
0035 sysirq: intpol-controller@10200620 {
0036 compatible = "mediatek,mt6797-sysirq",
0037 "mediatek,mt6577-sysirq";
0038 interrupt-controller;
0039 #interrupt-cells = <3>;
0040 interrupt-parent = <&gic>;
0041 reg = <0 0x10220620 0 0x20>,
0042 <0 0x10220690 0 0x10>;
0043 };