0001 Marvell Armada 370, 375, 38x, XP Interrupt Controller
0002 -----------------------------------------------------
0003
0004 Required properties:
0005 - compatible: Should be "marvell,mpic"
0006 - interrupt-controller: Identifies the node as an interrupt controller.
0007 - msi-controller: Identifies the node as an PCI Message Signaled
0008 Interrupt controller.
0009 - #interrupt-cells: The number of cells to define the interrupts. Should be 1.
0010 The cell is the IRQ number
0011
0012 - reg: Should contain PMIC registers location and length. First pair
0013 for the main interrupt registers, second pair for the per-CPU
0014 interrupt registers. For this last pair, to be compliant with SMP
0015 support, the "virtual" must be use (For the record, these registers
0016 automatically map to the interrupt controller registers of the
0017 current CPU)
0018
0019 Optional properties:
0020
0021 - interrupts: If defined, then it indicates that this MPIC is
0022 connected as a slave to another interrupt controller. This is
0023 typically the case on Armada 375 and Armada 38x, where the MPIC is
0024 connected as a slave to the Cortex-A9 GIC. The provided interrupt
0025 indicate to which GIC interrupt the MPIC output is connected.
0026
0027 Example:
0028
0029 mpic: interrupt-controller@d0020000 {
0030 compatible = "marvell,mpic";
0031 #interrupt-cells = <1>;
0032 #address-cells = <1>;
0033 #size-cells = <1>;
0034 interrupt-controller;
0035 msi-controller;
0036 reg = <0xd0020a00 0x1d0>,
0037 <0xd0021070 0x58>;
0038 };
