0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006
0007 title: Loongson-3 HyperTransport Interrupt Vector Controller
0008
0009 maintainers:
0010 - Jiaxun Yang <jiaxun.yang@flygoat.com>
0011
0012 description:
0013 This interrupt controller is found in the Loongson-3 family of chips for
0014 receiving vectorized interrupts from PCH's interrupt controller.
0015
0016 properties:
0017 compatible:
0018 const: loongson,htvec-1.0
0019
0020 reg:
0021 maxItems: 1
0022
0023 interrupts:
0024 minItems: 1
0025 maxItems: 8
0026 description: Eight parent interrupts that receive chained interrupts.
0027
0028 interrupt-controller: true
0029
0030 '#interrupt-cells':
0031 const: 1
0032
0033 required:
0034 - compatible
0035 - reg
0036 - interrupts
0037 - interrupt-controller
0038 - '#interrupt-cells'
0039
0040 additionalProperties: false
0041
0042 examples:
0043 - |
0044 #include <dt-bindings/interrupt-controller/irq.h>
0045 htvec: interrupt-controller@fb000080 {
0046 compatible = "loongson,htvec-1.0";
0047 reg = <0xfb000080 0x40>;
0048 interrupt-controller;
0049 #interrupt-cells = <1>;
0050
0051 interrupt-parent = <&liointc>;
0052 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
0053 <25 IRQ_TYPE_LEVEL_HIGH>,
0054 <26 IRQ_TYPE_LEVEL_HIGH>,
0055 <27 IRQ_TYPE_LEVEL_HIGH>;
0056 };
0057 ...
