0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htpic.yaml#"
0005 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0006
0007 title: Loongson-3 HyperTransport Interrupt Controller
0008
0009 maintainers:
0010 - Jiaxun Yang <jiaxun.yang@flygoat.com>
0011
0012 allOf:
0013 - $ref: /schemas/interrupt-controller.yaml#
0014
0015 description: |
0016 This interrupt controller is found in the Loongson-3 family of chips to transmit
0017 interrupts from PCH PIC connected on HyperTransport bus.
0018
0019 properties:
0020 compatible:
0021 const: loongson,htpic-1.0
0022
0023 reg:
0024 maxItems: 1
0025
0026 interrupts:
0027 minItems: 1
0028 maxItems: 4
0029 description: |
0030 Four parent interrupts that receive chained interrupts.
0031
0032 interrupt-controller: true
0033
0034 '#interrupt-cells':
0035 const: 1
0036
0037 required:
0038 - compatible
0039 - reg
0040 - interrupts
0041 - interrupt-controller
0042 - '#interrupt-cells'
0043
0044 unevaluatedProperties: false
0045
0046 examples:
0047 - |
0048 #include <dt-bindings/interrupt-controller/irq.h>
0049 htintc: interrupt-controller@1fb000080 {
0050 compatible = "loongson,htpic-1.0";
0051 reg = <0xfb000080 0x40>;
0052 interrupt-controller;
0053 #interrupt-cells = <1>;
0054
0055 interrupt-parent = <&liointc>;
0056 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
0057 <25 IRQ_TYPE_LEVEL_HIGH>,
0058 <26 IRQ_TYPE_LEVEL_HIGH>,
0059 <27 IRQ_TYPE_LEVEL_HIGH>;
0060 };
0061 ...
