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OSCL-LXR

 
 

    


0001 Specifying interrupt information for devices
0002 ============================================
0003 
0004 1) Interrupt client nodes
0005 -------------------------
0006 
0007 Nodes that describe devices which generate interrupts must contain an
0008 "interrupts" property, an "interrupts-extended" property, or both. If both are
0009 present, the latter should take precedence; the former may be provided simply
0010 for compatibility with software that does not recognize the latter. These
0011 properties contain a list of interrupt specifiers, one per output interrupt. The
0012 format of the interrupt specifier is determined by the interrupt controller to
0013 which the interrupts are routed; see section 2 below for details.
0014 
0015   Example:
0016         interrupt-parent = <&intc1>;
0017         interrupts = <5 0>, <6 0>;
0018 
0019 The "interrupt-parent" property is used to specify the controller to which
0020 interrupts are routed and contains a single phandle referring to the interrupt
0021 controller node. This property is inherited, so it may be specified in an
0022 interrupt client node or in any of its parent nodes. Interrupts listed in the
0023 "interrupts" property are always in reference to the node's interrupt parent.
0024 
0025 The "interrupts-extended" property is a special form; useful when a node needs
0026 to reference multiple interrupt parents or a different interrupt parent than
0027 the inherited one. Each entry in this property contains both the parent phandle
0028 and the interrupt specifier.
0029 
0030   Example:
0031         interrupts-extended = <&intc1 5 1>, <&intc2 1 0>;
0032 
0033 2) Interrupt controller nodes
0034 -----------------------------
0035 
0036 A device is marked as an interrupt controller with the "interrupt-controller"
0037 property. This is a empty, boolean property. An additional "#interrupt-cells"
0038 property defines the number of cells needed to specify a single interrupt.
0039 
0040 It is the responsibility of the interrupt controller's binding to define the
0041 length and format of the interrupt specifier. The following two variants are
0042 commonly used:
0043 
0044   a) one cell
0045   -----------
0046   The #interrupt-cells property is set to 1 and the single cell defines the
0047   index of the interrupt within the controller.
0048 
0049   Example:
0050 
0051         vic: intc@10140000 {
0052                 compatible = "arm,versatile-vic";
0053                 interrupt-controller;
0054                 #interrupt-cells = <1>;
0055                 reg = <0x10140000 0x1000>;
0056         };
0057 
0058         sic: intc@10003000 {
0059                 compatible = "arm,versatile-sic";
0060                 interrupt-controller;
0061                 #interrupt-cells = <1>;
0062                 reg = <0x10003000 0x1000>;
0063                 interrupt-parent = <&vic>;
0064                 interrupts = <31>; /* Cascaded to vic */
0065         };
0066 
0067   b) two cells
0068   ------------
0069   The #interrupt-cells property is set to 2 and the first cell defines the
0070   index of the interrupt within the controller, while the second cell is used
0071   to specify any of the following flags:
0072     - bits[3:0] trigger type and level flags
0073         1 = low-to-high edge triggered
0074         2 = high-to-low edge triggered
0075         4 = active high level-sensitive
0076         8 = active low level-sensitive
0077 
0078   Example:
0079 
0080         i2c@7000c000 {
0081                 gpioext: gpio-adnp@41 {
0082                         compatible = "ad,gpio-adnp";
0083                         reg = <0x41>;
0084 
0085                         interrupt-parent = <&gpio>;
0086                         interrupts = <160 1>;
0087 
0088                         gpio-controller;
0089                         #gpio-cells = <1>;
0090 
0091                         interrupt-controller;
0092                         #interrupt-cells = <2>;
0093 
0094                         nr-gpios = <64>;
0095                 };
0096 
0097                 sx8634@2b {
0098                         compatible = "smtc,sx8634";
0099                         reg = <0x2b>;
0100 
0101                         interrupt-parent = <&gpioext>;
0102                         interrupts = <3 0x8>;
0103 
0104                         #address-cells = <1>;
0105                         #size-cells = <0>;
0106 
0107                         threshold = <0x40>;
0108                         sensitivity = <7>;
0109                 };
0110         };
0111 
0112 3) Interrupt wakeup parent
0113 --------------------------
0114 
0115 Some interrupt controllers in a SoC, are always powered on and have a select
0116 interrupts routed to them, so that they can wakeup the SoC from suspend. These
0117 interrupt controllers do not fall into the category of a parent interrupt
0118 controller and can be specified by the "wakeup-parent" property and contain a
0119 single phandle referring to the wakeup capable interrupt controller.
0120 
0121    Example:
0122         wakeup-parent = <&pdc_intc>;