0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/interconnect/qcom,qcm2290.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Qualcomm QCM2290 Network-On-Chip interconnect
0008
0009 maintainers:
0010 - Shawn Guo <shawn.guo@linaro.org>
0011
0012 description: |
0013 The Qualcomm QCM2290 interconnect providers support adjusting the
0014 bandwidth requirements between the various NoC fabrics.
0015
0016 properties:
0017 reg:
0018 maxItems: 1
0019
0020 compatible:
0021 enum:
0022 - qcom,qcm2290-bimc
0023 - qcom,qcm2290-cnoc
0024 - qcom,qcm2290-snoc
0025
0026 '#interconnect-cells':
0027 const: 1
0028
0029 clock-names:
0030 items:
0031 - const: bus
0032 - const: bus_a
0033
0034 clocks:
0035 items:
0036 - description: Bus Clock
0037 - description: Bus A Clock
0038
0039 # Child node's properties
0040 patternProperties:
0041 '^interconnect-[a-z0-9]+$':
0042 type: object
0043 description:
0044 The interconnect providers do not have a separate QoS register space,
0045 but share parent's space.
0046
0047 properties:
0048 compatible:
0049 enum:
0050 - qcom,qcm2290-qup-virt
0051 - qcom,qcm2290-mmrt-virt
0052 - qcom,qcm2290-mmnrt-virt
0053
0054 '#interconnect-cells':
0055 const: 1
0056
0057 clock-names:
0058 items:
0059 - const: bus
0060 - const: bus_a
0061
0062 clocks:
0063 items:
0064 - description: Bus Clock
0065 - description: Bus A Clock
0066
0067 required:
0068 - compatible
0069 - '#interconnect-cells'
0070 - clock-names
0071 - clocks
0072
0073 additionalProperties: false
0074
0075 required:
0076 - compatible
0077 - reg
0078 - '#interconnect-cells'
0079 - clock-names
0080 - clocks
0081
0082 additionalProperties: false
0083
0084 examples:
0085 - |
0086 #include <dt-bindings/clock/qcom,rpmcc.h>
0087
0088 snoc: interconnect@1880000 {
0089 compatible = "qcom,qcm2290-snoc";
0090 reg = <0x01880000 0x60200>;
0091 #interconnect-cells = <1>;
0092 clock-names = "bus", "bus_a";
0093 clocks = <&rpmcc RPM_SMD_SNOC_CLK>,
0094 <&rpmcc RPM_SMD_SNOC_A_CLK>;
0095
0096 qup_virt: interconnect-qup {
0097 compatible = "qcom,qcm2290-qup-virt";
0098 #interconnect-cells = <1>;
0099 clock-names = "bus", "bus_a";
0100 clocks = <&rpmcc RPM_SMD_QUP_CLK>,
0101 <&rpmcc RPM_SMD_QUP_A_CLK>;
0102 };
0103
0104 mmnrt_virt: interconnect-mmnrt {
0105 compatible = "qcom,qcm2290-mmnrt-virt";
0106 #interconnect-cells = <1>;
0107 clock-names = "bus", "bus_a";
0108 clocks = <&rpmcc RPM_SMD_MMNRT_CLK>,
0109 <&rpmcc RPM_SMD_MMNRT_A_CLK>;
0110 };
0111
0112 mmrt_virt: interconnect-mmrt {
0113 compatible = "qcom,qcm2290-mmrt-virt";
0114 #interconnect-cells = <1>;
0115 clock-names = "bus", "bus_a";
0116 clocks = <&rpmcc RPM_SMD_MMRT_CLK>,
0117 <&rpmcc RPM_SMD_MMRT_A_CLK>;
0118 };
0119 };
0120
0121 cnoc: interconnect@1900000 {
0122 compatible = "qcom,qcm2290-cnoc";
0123 reg = <0x01900000 0x8200>;
0124 #interconnect-cells = <1>;
0125 clock-names = "bus", "bus_a";
0126 clocks = <&rpmcc RPM_SMD_CNOC_CLK>,
0127 <&rpmcc RPM_SMD_CNOC_A_CLK>;
0128 };
0129
0130 bimc: interconnect@4480000 {
0131 compatible = "qcom,qcm2290-bimc";
0132 reg = <0x04480000 0x80000>;
0133 #interconnect-cells = <1>;
0134 clock-names = "bus", "bus_a";
0135 clocks = <&rpmcc RPM_SMD_BIMC_CLK>,
0136 <&rpmcc RPM_SMD_BIMC_A_CLK>;
0137 };