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0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Qualcomm Interconnect Bandwidth Monitor
0008 
0009 maintainers:
0010   - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
0011 
0012 description: |
0013   Bandwidth Monitor measures current throughput on buses between various NoC
0014   fabrics and provides information when it crosses configured thresholds.
0015 
0016   Certain SoCs might have more than one Bandwidth Monitors, for example on SDM845::
0017    - Measuring the bandwidth between CPUs and Last Level Cache Controller -
0018      called just BWMON,
0019    - Measuring the bandwidth between Last Level Cache Controller and memory
0020      (DDR) - called LLCC BWMON.
0021 
0022 properties:
0023   compatible:
0024     oneOf:
0025       - items:
0026           - enum:
0027               - qcom,sdm845-bwmon
0028           - const: qcom,msm8998-bwmon
0029       - const: qcom,msm8998-bwmon       # BWMON v4
0030 
0031   interconnects:
0032     maxItems: 1
0033 
0034   interrupts:
0035     maxItems: 1
0036 
0037   operating-points-v2: true
0038   opp-table: true
0039 
0040   reg:
0041     # BWMON v4 (currently described) and BWMON v5 use one register address
0042     # space.  BWMON v2 uses two register spaces - not yet described.
0043     maxItems: 1
0044 
0045 required:
0046   - compatible
0047   - interconnects
0048   - interrupts
0049   - operating-points-v2
0050   - opp-table
0051   - reg
0052 
0053 additionalProperties: false
0054 
0055 examples:
0056   - |
0057     #include <dt-bindings/interconnect/qcom,sdm845.h>
0058     #include <dt-bindings/interrupt-controller/arm-gic.h>
0059 
0060     pmu@1436400 {
0061         compatible = "qcom,sdm845-bwmon", "qcom,msm8998-bwmon";
0062         reg = <0x01436400 0x600>;
0063         interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
0064         interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_LLCC 3>;
0065 
0066         operating-points-v2 = <&cpu_bwmon_opp_table>;
0067 
0068         cpu_bwmon_opp_table: opp-table {
0069             compatible = "operating-points-v2";
0070             opp-0 {
0071                 opp-peak-kBps = <4800000>;
0072             };
0073             opp-1 {
0074                 opp-peak-kBps = <9216000>;
0075             };
0076             opp-2 {
0077                 opp-peak-kBps = <15052800>;
0078             };
0079             opp-3 {
0080                 opp-peak-kBps = <20889600>;
0081             };
0082             opp-4 {
0083                 opp-peak-kBps = <25497600>;
0084             };
0085         };
0086     };