0001 # SPDX-License-Identifier: GPL-2.0
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/frequency/adf4371.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Analog Devices ADF4371/ADF4372 Wideband Synthesizers
0008
0009 maintainers:
0010 - Popa Stefan <stefan.popa@analog.com>
0011
0012 description: |
0013 Analog Devices ADF4371/ADF4372 SPI Wideband Synthesizers
0014 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4371.pdf
0015 https://www.analog.com/media/en/technical-documentation/data-sheets/adf4372.pdf
0016
0017 properties:
0018 compatible:
0019 enum:
0020 - adi,adf4371
0021 - adi,adf4372
0022
0023 reg:
0024 maxItems: 1
0025
0026 clocks:
0027 description:
0028 Definition of the external clock (see clock/clock-bindings.txt)
0029 maxItems: 1
0030
0031 clock-names:
0032 description:
0033 Must be "clkin"
0034 maxItems: 1
0035
0036 adi,mute-till-lock-en:
0037 type: boolean
0038 description:
0039 If this property is present, then the supply current to RF8P and RF8N
0040 output stage will shut down until the ADF4371/ADF4372 achieves lock as
0041 measured by the digital lock detect circuitry.
0042
0043 spi-max-frequency: true
0044
0045 required:
0046 - compatible
0047 - reg
0048 - clocks
0049 - clock-names
0050
0051 additionalProperties: false
0052
0053 examples:
0054 - |
0055 spi0 {
0056 #address-cells = <1>;
0057 #size-cells = <0>;
0058
0059 frequency@0 {
0060 compatible = "adi,adf4371";
0061 reg = <0>;
0062 spi-max-frequency = <1000000>;
0063 clocks = <&adf4371_clkin>;
0064 clock-names = "clkin";
0065 };
0066 };
0067 ...
