0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Texas Instruments ADC12138 and similar self-calibrating ADCs
0008
0009 maintainers:
0010 - Akinobu Mita <akinobu.mita@gmail.com>
0011
0012 description: |
0013 13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to
0014 correct for linearity, zero and full scale errors.
0015
0016 properties:
0017 compatible:
0018 enum:
0019 - ti,adc12130
0020 - ti,adc12132
0021 - ti,adc12138
0022
0023 reg:
0024 maxItems: 1
0025
0026 interrupts:
0027 maxItems: 1
0028 description: End of Conversion (EOC) interrupt
0029
0030 clocks:
0031 maxItems: 1
0032 description: Conversion clock input.
0033
0034 spi-max-frequency: true
0035
0036 vref-p-supply:
0037 description: The regulator supply for positive analog voltage reference
0038
0039 vref-n-supply:
0040 description: |
0041 The regulator supply for negative analog voltage reference
0042 (Note that this must not go below GND or exceed vref-p)
0043 If not specified, this is assumed to be analog ground.
0044
0045 ti,acquisition-time:
0046 $ref: /schemas/types.yaml#/definitions/uint32
0047 enum: [ 6, 10, 18, 34 ]
0048 description: |
0049 The number of conversion clock periods for the S/H's acquisition time.
0050 For high source impedances, this value can be increased to 18 or 34.
0051 For less ADC accuracy and/or slower CCLK frequencies this value may be
0052 decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the
0053 datasheet for details.
0054
0055 "#io-channel-cells":
0056 const: 1
0057
0058 required:
0059 - compatible
0060 - reg
0061 - interrupts
0062 - clocks
0063 - vref-p-supply
0064
0065 additionalProperties: false
0066
0067 examples:
0068 - |
0069 #include <dt-bindings/interrupt-controller/irq.h>
0070 spi {
0071 #address-cells = <1>;
0072 #size-cells = <0>;
0073
0074 adc@0 {
0075 compatible = "ti,adc12138";
0076 reg = <0>;
0077 interrupts = <28 IRQ_TYPE_EDGE_RISING>;
0078 interrupt-parent = <&gpio1>;
0079 clocks = <&cclk>;
0080 vref-p-supply = <&ldo4_reg>;
0081 spi-max-frequency = <5000000>;
0082 ti,acquisition-time = <6>;
0083 #io-channel-cells = <1>;
0084 };
0085 };
0086 ...
