0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: NXP LPC3220 SoC ADC controller
0008
0009 maintainers:
0010 - Gregory Clement <gregory.clement@bootlin.com>
0011
0012 description:
0013 This hardware block has been used on several LPC32XX SoCs.
0014
0015 properties:
0016 compatible:
0017 const: nxp,lpc3220-adc
0018
0019 reg:
0020 maxItems: 1
0021
0022 interrupts:
0023 maxItems: 1
0024
0025 vref-supply: true
0026
0027 "#io-channel-cells":
0028 const: 1
0029
0030 required:
0031 - compatible
0032 - reg
0033 - interrupts
0034
0035 additionalProperties: false
0036
0037 examples:
0038 - |
0039 soc {
0040 #address-cells = <1>;
0041 #size-cells = <1>;
0042 adc@40048000 {
0043 compatible = "nxp,lpc3220-adc";
0044 reg = <0x40048000 0x1000>;
0045 interrupt-parent = <&mic>;
0046 interrupts = <39 0>;
0047 vref-supply = <&vcc>;
0048 };
0049 };
0050 ...
