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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/adc/mediatek,mt2701-auxadc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Mediatek AUXADC - ADC on Mediatek mobile SoC (mt65xx/mt81xx/mt27xx)
0008 
0009 maintainers:
0010   - Zhiyong Tao <zhiyong.tao@mediatek.com>
0011   - Matthias Brugger <matthias.bgg@gmail.com>
0012 
0013 description: |
0014   The Auxiliary Analog/Digital Converter (AUXADC) is an ADC found
0015   in some Mediatek SoCs which among other things measures the temperatures
0016   in the SoC. It can be used directly with register accesses, but it is also
0017   used by thermal controller which reads the temperatures from the AUXADC
0018   directly via its own bus interface. See mediatek-thermal bindings
0019   for the Thermal Controller which holds a phandle to the AUXADC.
0020 
0021 properties:
0022   compatible:
0023     oneOf:
0024       - enum:
0025           - mediatek,mt2701-auxadc
0026           - mediatek,mt2712-auxadc
0027           - mediatek,mt6765-auxadc
0028           - mediatek,mt7622-auxadc
0029           - mediatek,mt8173-auxadc
0030       - items:
0031           - enum:
0032               - mediatek,mt7623-auxadc
0033           - const: mediatek,mt2701-auxadc
0034       - items:
0035           - enum:
0036               - mediatek,mt8183-auxadc
0037               - mediatek,mt8186-auxadc
0038               - mediatek,mt8188-auxadc
0039               - mediatek,mt8195-auxadc
0040               - mediatek,mt8516-auxadc
0041           - const: mediatek,mt8173-auxadc
0042 
0043   reg:
0044     maxItems: 1
0045 
0046   clocks:
0047     maxItems: 1
0048 
0049   clock-names:
0050     const: main
0051 
0052   "#io-channel-cells":
0053     const: 1
0054 
0055 additionalProperties: false
0056 
0057 required:
0058   - compatible
0059   - reg
0060   - clocks
0061   - clock-names
0062   - "#io-channel-cells"
0063 
0064 examples:
0065   - |
0066     #include <dt-bindings/clock/mt8183-clk.h>
0067     soc {
0068         #address-cells = <2>;
0069         #size-cells = <2>;
0070 
0071         adc@11001000 {
0072             compatible = "mediatek,mt8183-auxadc",
0073                          "mediatek,mt8173-auxadc";
0074             reg = <0 0x11001000 0 0x1000>;
0075             clocks = <&infracfg CLK_INFRA_AUXADC>;
0076             clock-names = "main";
0077             #io-channel-cells = <1>;
0078         };
0079     };
0080 ...