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0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 # Copyright 2019-2020 Artur Rojek
0003 %YAML 1.2
0004 ---
0005 $id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
0006 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
0007 
0008 title: Ingenic JZ47xx ADC controller IIO bindings
0009 
0010 maintainers:
0011   - Artur Rojek <contact@artur-rojek.eu>
0012 
0013 description: >
0014   Industrial I/O subsystem bindings for ADC controller found in
0015   Ingenic JZ47xx SoCs.
0016 
0017   ADC clients must use the format described in
0018   https://github.com/devicetree-org/dt-schema/blob/master/schemas/iio/iio-consumer.yaml,
0019   giving a phandle and IIO specifier pair ("io-channels") to the ADC controller.
0020 
0021 properties:
0022   compatible:
0023     enum:
0024       - ingenic,jz4725b-adc
0025       - ingenic,jz4740-adc
0026       - ingenic,jz4760-adc
0027       - ingenic,jz4760b-adc
0028       - ingenic,jz4770-adc
0029 
0030   '#io-channel-cells':
0031     const: 1
0032     description:
0033       Must be set to <1> to indicate channels are selected by index.
0034 
0035   reg:
0036     maxItems: 1
0037 
0038   clocks:
0039     maxItems: 1
0040 
0041   clock-names:
0042     items:
0043       - const: adc
0044 
0045   interrupts:
0046     maxItems: 1
0047 
0048   ingenic,use-internal-divider:
0049     description:
0050       If present, battery voltage is read from the VBAT_IR pin, which has an
0051       internal 1/4 divider. If absent, it is read through the VBAT_ER pin,
0052       which does not have such a divider.
0053     type: boolean
0054 
0055 if:
0056   not:
0057     properties:
0058       compatible:
0059         contains:
0060           const: ingenic,jz4760b-adc
0061 then:
0062   properties:
0063     ingenic,use-internal-divider: false
0064 
0065 required:
0066   - compatible
0067   - '#io-channel-cells'
0068   - reg
0069   - clocks
0070   - clock-names
0071   - interrupts
0072 
0073 additionalProperties: false
0074 
0075 examples:
0076   - |
0077     #include <dt-bindings/clock/ingenic,jz4740-cgu.h>
0078     #include <dt-bindings/iio/adc/ingenic,adc.h>
0079 
0080     adc@10070000 {
0081             compatible = "ingenic,jz4740-adc";
0082             #io-channel-cells = <1>;
0083 
0084             reg = <0x10070000 0x30>;
0085 
0086             clocks = <&cgu JZ4740_CLK_ADC>;
0087             clock-names = "adc";
0088 
0089             interrupt-parent = <&intc>;
0090             interrupts = <18>;
0091     };