0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: ADC that forms part of an ASPEED server management processor.
0008
0009 maintainers:
0010 - Joel Stanley <joel@jms.id.au>
0011
0012 description:
0013 This device is a 10-bit converter for 16 voltage channels. All inputs are
0014 single ended.
0015
0016 properties:
0017 compatible:
0018 enum:
0019 - aspeed,ast2400-adc
0020 - aspeed,ast2500-adc
0021
0022 reg:
0023 maxItems: 1
0024
0025 clocks:
0026 maxItems: 1
0027 description:
0028 Input clock used to derive the sample clock. Expected to be the
0029 SoC's APB clock.
0030
0031 resets:
0032 maxItems: 1
0033
0034 "#io-channel-cells":
0035 const: 1
0036
0037 required:
0038 - compatible
0039 - reg
0040 - clocks
0041 - resets
0042 - "#io-channel-cells"
0043
0044 additionalProperties: false
0045
0046 examples:
0047 - |
0048 #include <dt-bindings/clock/aspeed-clock.h>
0049 adc@1e6e9000 {
0050 compatible = "aspeed,ast2400-adc";
0051 reg = <0x1e6e9000 0xb0>;
0052 clocks = <&syscon ASPEED_CLK_APB>;
0053 resets = <&syscon ASPEED_RESET_ADC>;
0054 #io-channel-cells = <1>;
0055 };
0056 ...
