Back to home page

OSCL-LXR

 
 

    


0001 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006 
0007 title: Amlogic Meson SAR (Successive Approximation Register) A/D converter
0008 
0009 maintainers:
0010   - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
0011 
0012 description:
0013   Binding covers a range of ADCs found on Amlogic Meson SoCs.
0014 
0015 properties:
0016   compatible:
0017     oneOf:
0018       - const: amlogic,meson-saradc
0019       - items:
0020           - enum:
0021               - amlogic,meson8-saradc
0022               - amlogic,meson8b-saradc
0023               - amlogic,meson8m2-saradc
0024               - amlogic,meson-gxbb-saradc
0025               - amlogic,meson-gxl-saradc
0026               - amlogic,meson-gxm-saradc
0027               - amlogic,meson-axg-saradc
0028               - amlogic,meson-g12a-saradc
0029           - const: amlogic,meson-saradc
0030 
0031   reg:
0032     maxItems: 1
0033 
0034   interrupts:
0035     description: Interrupt indicates end of sampling.
0036     maxItems: 1
0037 
0038   clocks:
0039     minItems: 2
0040     maxItems: 4
0041 
0042   clock-names:
0043     minItems: 2
0044     items:
0045       - const: clkin
0046       - const: core
0047       - const: adc_clk
0048       - const: adc_sel
0049 
0050   vref-supply: true
0051 
0052   "#io-channel-cells":
0053     const: 1
0054 
0055   amlogic,hhi-sysctrl:
0056     $ref: /schemas/types.yaml#/definitions/phandle
0057     description:
0058       Syscon which contains the 5th bit of the TSC (temperature sensor
0059       coefficient) on Meson8b and Meson8m2 (which used to calibrate the
0060       temperature sensor)
0061 
0062   nvmem-cells:
0063     description: phandle to the temperature_calib eFuse cells
0064     maxItems: 1
0065 
0066   nvmem-cell-names:
0067     const: temperature_calib
0068 
0069 allOf:
0070   - if:
0071       properties:
0072         compatible:
0073           contains:
0074             enum:
0075               - amlogic,meson8-saradc
0076               - amlogic,meson8b-saradc
0077               - amlogic,meson8m2-saradc
0078     then:
0079       properties:
0080         clocks:
0081           maxItems: 2
0082         clock-names:
0083           maxItems: 2
0084     else:
0085       properties:
0086         nvmem-cells: false
0087         mvmem-cel-names: false
0088         clocks:
0089           minItems: 4
0090         clock-names:
0091           minItems: 4
0092 
0093   - if:
0094       properties:
0095         compatible:
0096           contains:
0097             enum:
0098               - amlogic,meson8b-saradc
0099               - amlogic,meson8m2-saradc
0100     then:
0101       properties:
0102         amlogic,hhi-sysctrl: true
0103     else:
0104       properties:
0105         amlogic,hhi-sysctrl: false
0106 
0107 required:
0108   - compatible
0109   - reg
0110   - interrupts
0111   - clocks
0112   - clock-names
0113   - "#io-channel-cells"
0114 
0115 additionalProperties: false
0116 
0117 examples:
0118   - |
0119     #include <dt-bindings/interrupt-controller/irq.h>
0120     #include <dt-bindings/clock/gxbb-clkc.h>
0121     #include <dt-bindings/interrupt-controller/arm-gic.h>
0122     soc {
0123         #address-cells = <2>;
0124         #size-cells = <2>;
0125         adc@8680 {
0126             compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
0127             #io-channel-cells = <1>;
0128             reg = <0x0 0x8680 0x0 0x34>;
0129             interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
0130             clocks = <&xtal>,
0131                 <&clkc CLKID_SAR_ADC>,
0132                 <&clkc CLKID_SAR_ADC_CLK>,
0133                 <&clkc CLKID_SAR_ADC_SEL>;
0134             clock-names = "clkin", "core", "adc_clk", "adc_sel";
0135         };
0136         adc@9680 {
0137             compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
0138             #io-channel-cells = <1>;
0139             reg = <0x0 0x9680 0x0 0x34>;
0140             interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
0141             clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
0142             clock-names = "clkin", "core";
0143             nvmem-cells = <&tsens_caldata>;
0144             nvmem-cell-names = "temperature_calib";
0145             amlogic,hhi-sysctrl = <&hhi>;
0146         };
0147     };
0148 ...