0001 # SPDX-License-Identifier: GPL-2.0-only
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/snps,designware-i2c.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Synopsys DesignWare APB I2C Controller
0008
0009 maintainers:
0010 - Jarkko Nikula <jarkko.nikula@linux.intel.com>
0011
0012 allOf:
0013 - $ref: /schemas/i2c/i2c-controller.yaml#
0014 - if:
0015 properties:
0016 compatible:
0017 not:
0018 contains:
0019 const: mscc,ocelot-i2c
0020 then:
0021 properties:
0022 reg:
0023 maxItems: 1
0024
0025 properties:
0026 compatible:
0027 oneOf:
0028 - description: Generic Synopsys DesignWare I2C controller
0029 const: snps,designware-i2c
0030 - description: Microsemi Ocelot SoCs I2C controller
0031 items:
0032 - const: mscc,ocelot-i2c
0033 - const: snps,designware-i2c
0034 - description: Baikal-T1 SoC System I2C controller
0035 const: baikal,bt1-sys-i2c
0036
0037 reg:
0038 minItems: 1
0039 items:
0040 - description: DW APB I2C controller memory mapped registers
0041 - description: |
0042 ICPU_CFG:TWI_DELAY registers to setup the SDA hold time.
0043 This registers are specific to the Ocelot I2C-controller.
0044
0045 interrupts:
0046 maxItems: 1
0047
0048 clocks:
0049 minItems: 1
0050 items:
0051 - description: I2C controller reference clock source
0052 - description: APB interface clock source
0053
0054 clock-names:
0055 minItems: 1
0056 items:
0057 - const: ref
0058 - const: pclk
0059
0060 resets:
0061 maxItems: 1
0062
0063 clock-frequency:
0064 description: Desired I2C bus clock frequency in Hz
0065 enum: [100000, 400000, 1000000, 3400000]
0066 default: 400000
0067
0068 i2c-sda-hold-time-ns:
0069 description: |
0070 The property should contain the SDA hold time in nanoseconds. This option
0071 is only supported in hardware blocks version 1.11a or newer or on
0072 Microsemi SoCs.
0073
0074 i2c-scl-falling-time-ns:
0075 description: |
0076 The property should contain the SCL falling time in nanoseconds.
0077 This value is used to compute the tLOW period.
0078 default: 300
0079
0080 i2c-sda-falling-time-ns:
0081 description: |
0082 The property should contain the SDA falling time in nanoseconds.
0083 This value is used to compute the tHIGH period.
0084 default: 300
0085
0086 dmas:
0087 items:
0088 - description: TX DMA Channel
0089 - description: RX DMA Channel
0090
0091 dma-names:
0092 items:
0093 - const: tx
0094 - const: rx
0095
0096 unevaluatedProperties: false
0097
0098 required:
0099 - compatible
0100 - reg
0101 - interrupts
0102
0103 examples:
0104 - |
0105 i2c@f0000 {
0106 compatible = "snps,designware-i2c";
0107 reg = <0xf0000 0x1000>;
0108 interrupts = <11>;
0109 clock-frequency = <400000>;
0110 };
0111 - |
0112 i2c@1120000 {
0113 compatible = "snps,designware-i2c";
0114 reg = <0x1120000 0x1000>;
0115 interrupts = <12 1>;
0116 clock-frequency = <400000>;
0117 i2c-sda-hold-time-ns = <300>;
0118 i2c-sda-falling-time-ns = <300>;
0119 i2c-scl-falling-time-ns = <300>;
0120 };
0121 - |
0122 i2c@2000 {
0123 compatible = "snps,designware-i2c";
0124 reg = <0x2000 0x100>;
0125 #address-cells = <1>;
0126 #size-cells = <0>;
0127 clock-frequency = <400000>;
0128 clocks = <&i2cclk>;
0129 interrupts = <0>;
0130
0131 eeprom@64 {
0132 compatible = "atmel,24c02";
0133 reg = <0x64>;
0134 };
0135 };
0136 - |
0137 i2c@100400 {
0138 compatible = "mscc,ocelot-i2c", "snps,designware-i2c";
0139 reg = <0x100400 0x100>, <0x198 0x8>;
0140 pinctrl-0 = <&i2c_pins>;
0141 pinctrl-names = "default";
0142 interrupts = <8>;
0143 clocks = <&ahb_clk>;
0144 };
0145 ...
