0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/renesas,rcar-i2c.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Renesas R-Car I2C Controller
0008
0009 maintainers:
0010 - Wolfram Sang <wsa+renesas@sang-engineering.com>
0011
0012 properties:
0013 compatible:
0014 oneOf:
0015 - items:
0016 - enum:
0017 - renesas,i2c-r8a7778 # R-Car M1A
0018 - renesas,i2c-r8a7779 # R-Car H1
0019 - const: renesas,rcar-gen1-i2c # R-Car Gen1
0020
0021 - items:
0022 - enum:
0023 - renesas,i2c-r8a7742 # RZ/G1H
0024 - renesas,i2c-r8a7743 # RZ/G1M
0025 - renesas,i2c-r8a7744 # RZ/G1N
0026 - renesas,i2c-r8a7745 # RZ/G1E
0027 - renesas,i2c-r8a77470 # RZ/G1C
0028 - renesas,i2c-r8a7790 # R-Car H2
0029 - renesas,i2c-r8a7791 # R-Car M2-W
0030 - renesas,i2c-r8a7792 # R-Car V2H
0031 - renesas,i2c-r8a7793 # R-Car M2-N
0032 - renesas,i2c-r8a7794 # R-Car E2
0033 - const: renesas,rcar-gen2-i2c # R-Car Gen2 and RZ/G1
0034
0035 - items:
0036 - enum:
0037 - renesas,i2c-r8a774a1 # RZ/G2M
0038 - renesas,i2c-r8a774b1 # RZ/G2N
0039 - renesas,i2c-r8a774c0 # RZ/G2E
0040 - renesas,i2c-r8a774e1 # RZ/G2H
0041 - renesas,i2c-r8a7795 # R-Car H3
0042 - renesas,i2c-r8a7796 # R-Car M3-W
0043 - renesas,i2c-r8a77961 # R-Car M3-W+
0044 - renesas,i2c-r8a77965 # R-Car M3-N
0045 - renesas,i2c-r8a77970 # R-Car V3M
0046 - renesas,i2c-r8a77980 # R-Car V3H
0047 - renesas,i2c-r8a77990 # R-Car E3
0048 - renesas,i2c-r8a77995 # R-Car D3
0049 - const: renesas,rcar-gen3-i2c # R-Car Gen3 and RZ/G2
0050
0051 - items:
0052 - enum:
0053 - renesas,i2c-r8a779a0 # R-Car V3U
0054 - renesas,i2c-r8a779f0 # R-Car S4-8
0055 - const: renesas,rcar-gen4-i2c # R-Car Gen4
0056
0057 reg:
0058 maxItems: 1
0059
0060 interrupts:
0061 maxItems: 1
0062
0063 clock-frequency:
0064 description:
0065 Desired I2C bus clock frequency in Hz. The absence of this property
0066 indicates the default frequency 100 kHz.
0067
0068 clocks:
0069 maxItems: 1
0070
0071 power-domains:
0072 maxItems: 1
0073
0074 resets:
0075 maxItems: 1
0076
0077 dmas:
0078 minItems: 2
0079 maxItems: 4
0080 description:
0081 Must contain a list of pairs of references to DMA specifiers, one for
0082 transmission, and one for reception.
0083
0084 dma-names:
0085 minItems: 2
0086 maxItems: 4
0087 items:
0088 enum:
0089 - tx
0090 - rx
0091
0092 i2c-scl-falling-time-ns:
0093 default: 35
0094 description:
0095 Number of nanoseconds the SCL signal takes to fall; t(f) in the I2C
0096 specification.
0097
0098 i2c-scl-internal-delay-ns:
0099 default: 50
0100 description:
0101 Number of nanoseconds the IP core additionally needs to setup SCL.
0102
0103 i2c-scl-rising-time-ns:
0104 default: 200
0105 description:
0106 Number of nanoseconds the SCL signal takes to rise; t(r) in the I2C
0107 specification.
0108
0109 required:
0110 - compatible
0111 - reg
0112 - interrupts
0113 - clocks
0114 - power-domains
0115 - '#address-cells'
0116 - '#size-cells'
0117
0118 allOf:
0119 - $ref: /schemas/i2c/i2c-controller.yaml#
0120
0121 - if:
0122 properties:
0123 compatible:
0124 contains:
0125 enum:
0126 - renesas,rcar-gen1-i2c
0127 - renesas,rcar-gen2-i2c
0128 then:
0129 properties:
0130 dmas: false
0131 dma-names: false
0132
0133 - if:
0134 properties:
0135 compatible:
0136 contains:
0137 enum:
0138 - renesas,rcar-gen2-i2c
0139 - renesas,rcar-gen3-i2c
0140 - renesas,rcar-gen4-i2c
0141 then:
0142 required:
0143 - resets
0144
0145 unevaluatedProperties: false
0146
0147 examples:
0148 - |
0149 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
0150 #include <dt-bindings/interrupt-controller/arm-gic.h>
0151 #include <dt-bindings/power/r8a7791-sysc.h>
0152
0153 i2c0: i2c@e6508000 {
0154 #address-cells = <1>;
0155 #size-cells = <0>;
0156 compatible = "renesas,i2c-r8a7791", "renesas,rcar-gen2-i2c";
0157 reg = <0xe6508000 0x40>;
0158 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
0159 clock-frequency = <400000>;
0160 clocks = <&cpg CPG_MOD 931>;
0161 power-domains = <&sysc R8A7791_PD_ALWAYS_ON>;
0162 resets = <&cpg 931>;
0163 i2c-scl-internal-delay-ns = <6>;
0164 };
