0001 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: nuvoton NPCM7XX I2C Controller Device Tree Bindings
0008
0009 description: |
0010 I2C bus controllers of the NPCM series support both master and
0011 slave mode. Each controller can switch between master and slave at run time
0012 (i.e. IPMB mode). HW FIFO for TX and RX are supported.
0013
0014 maintainers:
0015 - Tali Perry <tali.perry1@gmail.com>
0016
0017 properties:
0018 compatible:
0019 enum:
0020 - nuvoton,npcm750-i2c
0021 - nuvoton,npcm845-i2c
0022
0023 reg:
0024 maxItems: 1
0025
0026 interrupts:
0027 maxItems: 1
0028
0029 clocks:
0030 maxItems: 1
0031 description: Reference clock for the I2C bus
0032
0033 clock-frequency:
0034 description: Desired I2C bus clock frequency in Hz. If not specified,
0035 the default 100 kHz frequency will be used.
0036 possible values are 100000, 400000 and 1000000.
0037 default: 100000
0038 enum: [100000, 400000, 1000000]
0039
0040 nuvoton,sys-mgr:
0041 $ref: /schemas/types.yaml#/definitions/phandle
0042 description: The phandle of system manager register node.
0043
0044 required:
0045 - compatible
0046 - reg
0047 - interrupts
0048 - clocks
0049
0050 allOf:
0051 - $ref: /schemas/i2c/i2c-controller.yaml#
0052 - if:
0053 properties:
0054 compatible:
0055 contains:
0056 const: nuvoton,npcm845-i2c
0057
0058 then:
0059 required:
0060 - nuvoton,sys-mgr
0061
0062 unevaluatedProperties: false
0063
0064 examples:
0065 - |
0066 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
0067 #include <dt-bindings/interrupt-controller/arm-gic.h>
0068 i2c0: i2c@80000 {
0069 reg = <0x80000 0x1000>;
0070 clocks = <&clk NPCM7XX_CLK_APB2>;
0071 clock-frequency = <100000>;
0072 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
0073 compatible = "nuvoton,npcm750-i2c";
0074 nuvoton,sys-mgr = <&gcr>;
0075 };
0076
0077 ...
