0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Mellanox I2C SMBus on BlueField SoCs
0008
0009 maintainers:
0010 - Khalil Blaiech <kblaiech@nvidia.com>
0011
0012 allOf:
0013 - $ref: /schemas/i2c/i2c-controller.yaml#
0014
0015 properties:
0016 compatible:
0017 enum:
0018 - mellanox,i2c-mlxbf1
0019 - mellanox,i2c-mlxbf2
0020
0021 reg:
0022 minItems: 3
0023 items:
0024 - description: Smbus block registers
0025 - description: Cause master registers
0026 - description: Cause slave registers
0027 - description: Cause coalesce registers
0028
0029 interrupts:
0030 maxItems: 1
0031
0032 clock-frequency:
0033 enum: [ 100000, 400000, 1000000 ]
0034 description:
0035 bus frequency used to configure timing registers;
0036 The frequency is expressed in Hz. Default is 100000.
0037
0038 required:
0039 - compatible
0040 - reg
0041 - interrupts
0042
0043 unevaluatedProperties: false
0044
0045 if:
0046 properties:
0047 compatible:
0048 contains:
0049 enum:
0050 - mellanox,i2c-mlxbf1
0051
0052 then:
0053 properties:
0054 reg:
0055 maxItems: 3
0056
0057 examples:
0058 - |
0059 i2c@2804000 {
0060 compatible = "mellanox,i2c-mlxbf1";
0061 reg = <0x02804000 0x800>,
0062 <0x02801200 0x020>,
0063 <0x02801260 0x020>;
0064 interrupts = <57>;
0065 clock-frequency = <100000>;
0066 };
0067
0068 - |
0069 i2c@2808800 {
0070 compatible = "mellanox,i2c-mlxbf2";
0071 reg = <0x02808800 0x600>,
0072 <0x02808e00 0x020>,
0073 <0x02808e20 0x020>,
0074 <0x02808e40 0x010>;
0075 interrupts = <57>;
0076 clock-frequency = <400000>;
0077 };
