0001 CE4100 I2C
0002 ----------
0003
0004 CE4100 has one PCI device which is described as the I2C-Controller. This
0005 PCI device has three PCI-bars, each bar contains a complete I2C
0006 controller. So we have a total of three independent I2C-Controllers
0007 which share only an interrupt line.
0008 The driver is probed via the PCI-ID and is gathering the information of
0009 attached devices from the devices tree.
0010 Grant Likely recommended to use the ranges property to map the PCI-Bar
0011 number to its physical address and to use this to find the child nodes
0012 of the specific I2C controller. This were his exact words:
0013
0014 Here's where the magic happens. Each entry in
0015 ranges describes how the parent pci address space
0016 (middle group of 3) is translated to the local
0017 address space (first group of 2) and the size of
0018 each range (last cell). In this particular case,
0019 the first cell of the local address is chosen to be
0020 1:1 mapped to the BARs, and the second is the
0021 offset from be base of the BAR (which would be
0022 non-zero if you had 2 or more devices mapped off
0023 the same BAR)
0024
0025 ranges allows the address mapping to be described
0026 in a way that the OS can interpret without
0027 requiring custom device driver code.
0028
0029 This is an example which is used on FalconFalls:
0030 ------------------------------------------------
0031 i2c-controller@b,2 {
0032 #address-cells = <2>;
0033 #size-cells = <1>;
0034 compatible = "pci8086,2e68.2",
0035 "pci8086,2e68",
0036 "pciclass,ff0000",
0037 "pciclass,ff00";
0038
0039 reg = <0x15a00 0x0 0x0 0x0 0x0>;
0040 interrupts = <16 1>;
0041
0042 /* as described by Grant, the first number in the group of
0043 * three is the bar number followed by the 64bit bar address
0044 * followed by size of the mapping. The bar address
0045 * requires also a valid translation in parents ranges
0046 * property.
0047 */
0048 ranges = <0 0 0x02000000 0 0xdffe0500 0x100
0049 1 0 0x02000000 0 0xdffe0600 0x100
0050 2 0 0x02000000 0 0xdffe0700 0x100>;
0051
0052 i2c@0 {
0053 #address-cells = <1>;
0054 #size-cells = <0>;
0055 compatible = "intel,ce4100-i2c-controller";
0056
0057 /* The first number in the reg property is the
0058 * number of the bar
0059 */
0060 reg = <0 0 0x100>;
0061
0062 /* This I2C controller has no devices */
0063 };
0064
0065 i2c@1 {
0066 #address-cells = <1>;
0067 #size-cells = <0>;
0068 compatible = "intel,ce4100-i2c-controller";
0069 reg = <1 0 0x100>;
0070
0071 /* This I2C controller has one gpio controller */
0072 gpio@26 {
0073 #gpio-cells = <2>;
0074 compatible = "nxp,pcf8575";
0075 reg = <0x26>;
0076 gpio-controller;
0077 };
0078 };
0079
0080 i2c@2 {
0081 #address-cells = <1>;
0082 #size-cells = <0>;
0083 compatible = "intel,ce4100-i2c-controller";
0084 reg = <2 0 0x100>;
0085
0086 gpio@26 {
0087 #gpio-cells = <2>;
0088 compatible = "nxp,pcf8575";
0089 reg = <0x26>;
0090 gpio-controller;
0091 };
0092 };
0093 };
