0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/i2c-mpc.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: I2C-Bus adapter for MPC824x/83xx/85xx/86xx/512x/52xx SoCs
0008
0009 maintainers:
0010 - Chris Packham <chris.packham@alliedtelesis.co.nz>
0011
0012 allOf:
0013 - $ref: /schemas/i2c/i2c-controller.yaml#
0014
0015 properties:
0016 compatible:
0017 oneOf:
0018 - items:
0019 - enum:
0020 - mpc5200-i2c
0021 - fsl,mpc5200-i2c
0022 - fsl,mpc5121-i2c
0023 - fsl,mpc8313-i2c
0024 - fsl,mpc8543-i2c
0025 - fsl,mpc8544-i2c
0026 - const: fsl-i2c
0027 - items:
0028 - const: fsl,mpc5200b-i2c
0029 - const: fsl,mpc5200-i2c
0030 - const: fsl-i2c
0031
0032 reg:
0033 maxItems: 1
0034
0035 interrupts:
0036 maxItems: 1
0037
0038 fsl,preserve-clocking:
0039 $ref: /schemas/types.yaml#/definitions/flag
0040 description: |
0041 if defined, the clock settings from the bootloader are
0042 preserved (not touched)
0043
0044 fsl,timeout:
0045 $ref: /schemas/types.yaml#/definitions/uint32
0046 description: |
0047 I2C bus timeout in microseconds
0048
0049 fsl,i2c-erratum-a004447:
0050 $ref: /schemas/types.yaml#/definitions/flag
0051 description: |
0052 Indicates the presence of QorIQ erratum A-004447, which
0053 says that the standard i2c recovery scheme mechanism does
0054 not work and an alternate implementation is needed.
0055
0056 required:
0057 - compatible
0058 - reg
0059 - interrupts
0060
0061 unevaluatedProperties: false
0062
0063 examples:
0064 - |
0065 /* MPC5121 based board */
0066 i2c@1740 {
0067 #address-cells = <1>;
0068 #size-cells = <0>;
0069 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
0070 reg = <0x1740 0x20>;
0071 interrupts = <11 0x8>;
0072 interrupt-parent = <&ipic>;
0073 clock-frequency = <100000>;
0074 };
0075
0076 - |
0077 /* MPC5200B based board */
0078 i2c@3d00 {
0079 #address-cells = <1>;
0080 #size-cells = <0>;
0081 compatible = "fsl,mpc5200b-i2c", "fsl,mpc5200-i2c", "fsl-i2c";
0082 reg = <0x3d00 0x40>;
0083 interrupts = <2 15 0>;
0084 interrupt-parent = <&mpc5200_pic>;
0085 fsl,preserve-clocking;
0086 };
0087
0088 - |
0089 /* MPC8544 base board */
0090 i2c@3100 {
0091 #address-cells = <1>;
0092 #size-cells = <0>;
0093 compatible = "fsl,mpc8544-i2c", "fsl-i2c";
0094 reg = <0x3100 0x100>;
0095 interrupts = <43 2>;
0096 interrupt-parent = <&mpic>;
0097 clock-frequency = <400000>;
0098 fsl,timeout = <10000>;
0099 };
0100 ...
