bindings/i2c/i2c-exynos5.yaml

0001 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
0002 %YAML 1.2
0003 ---
0004 $id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
0005 $schema: http://devicetree.org/meta-schemas/core.yaml#
0006
0007 title: Samsung's High Speed I2C controller
0008
0009 maintainers:
0010   - Krzysztof Kozlowski <krzk@kernel.org>
0011
0012 description: |
0013   The Samsung's High Speed I2C controller is used to interface with I2C devices
0014   at various speeds ranging from 100kHz to 3.4MHz.
0015
0016   In case the HSI2C controller is encapsulated within USI block (it's the case
0017   e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
0018   define USI node in device tree file, choosing "i2c" configuration. Please see
0019   Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
0020
0021 properties:
0022   compatible:
0023     oneOf:
0024       - enum:
0025           - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
0026           - samsung,exynos5260-hsi2c    # Exynos5260
0027           - samsung,exynos7-hsi2c       # Exynos7
0028           - samsung,exynosautov9-hsi2c  # ExynosAutoV9 and Exynos850
0029       - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420
0030         deprecated: true
0031
0032   reg:
0033     maxItems: 1
0034
0035   interrupts:
0036     maxItems: 1
0037
0038   clock-frequency:
0039     default: 100000
0040     description:
0041       Desired operating frequency in Hz of the bus.
0042
0043       If not specified, the bus operates in fast-speed mode at 100kHz.
0044
0045       If specified, the bus operates in high-speed mode only if the
0046       clock-frequency is >= 1MHz.
0047
0048   clocks:
0049     minItems: 1
0050     items:
0051       - description: I2C operating clock
0052       - description: Bus clock (APB)
0053
0054   clock-names:
0055     minItems: 1
0056     items:
0057       - const: hsi2c
0058       - const: hsi2c_pclk
0059
0060 required:
0061   - compatible
0062   - reg
0063   - interrupts
0064   - clocks
0065
0066 allOf:
0067   - $ref: /schemas/i2c/i2c-controller.yaml#
0068   - if:
0069       properties:
0070         compatible:
0071           contains:
0072             enum:
0073               - samsung,exynosautov9-hsi2c
0074
0075     then:
0076       properties:
0077         clocks:
0078           minItems: 2
0079
0080         clock-names:
0081           minItems: 2
0082
0083       required:
0084         - clock-names
0085
0086     else:
0087       properties:
0088         clocks:
0089           maxItems: 1
0090
0091 unevaluatedProperties: false
0092
0093 examples:
0094   - |
0095     #include <dt-bindings/clock/exynos5420.h>
0096     #include <dt-bindings/interrupt-controller/arm-gic.h>
0097     #include <dt-bindings/interrupt-controller/irq.h>
0098
0099     hsi2c_8: i2c@12e00000 {
0100         compatible = "samsung,exynos5250-hsi2c";
0101         reg = <0x12e00000 0x1000>;
0102         interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
0103         #address-cells = <1>;
0104         #size-cells = <0>;
0105         clock-frequency = <100000>;
0106         clocks = <&clock CLK_USI4>;
0107         clock-names = "hsi2c";
0108
0109         pmic@66 {
0110             /* compatible = "samsung,s2mps11-pmic"; */
0111             reg = <0x66>;
0112         };
0113     };
0114
0115   - |
0116     #include <dt-bindings/clock/exynos850.h>
0117     #include <dt-bindings/interrupt-controller/arm-gic.h>
0118
0119     hsi2c_2: i2c@138c0000 {
0120         compatible = "samsung,exynosautov9-hsi2c";
0121         reg = <0x138c0000 0xc0>;
0122         interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
0123         #address-cells = <1>;
0124         #size-cells = <0>;
0125         clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
0126                  <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
0127         clock-names = "hsi2c", "hsi2c_pclk";
0128
0129         pmic@66 {
0130             /* compatible = "samsung,s2mps11-pmic"; */
0131             reg = <0x66>;
0132         };
0133     };